Obsolete (was New P1V code with some new compile options...)
Cluso99
Posts: 18,069
I am going to let this thread die and move the info to this thread
http://forums.parallax.com/showthread.php/160690-P1V-Hub-running-4x-(4-cogs)-and-2x-faster-(now-1-4-1-8-was-1-16)
I have taken the latest base GitHub code (as at 5Mar2015) and added options to compile the code as follows...
NOT_SCRAMBLED
By default, the ROM is scrambled. By defining NOT_SCRAMBLED, the unscrambled ROM file will be used.
The scrambled ROM identifies as Propeller Version 1, the unscrambled ROM identifies as Propeller Version 2.
CLUSO_ROMHI
When defining CLUSO_ROMHI in conjunction with defining NOT_SCRAMBED, the unscrambled cluso ROM will be used.
The cluso ROM has my Faster Spin Interpreter with the $F000..FFFF section of the ROM reorganised so that the vector table used by my interpreter can be positioned at $FBF8..FFF7. The booter/runner/interpreter all still start at their original ROM addresses although the runner is now split into 3 sections $FFF8..FFFF, $F7A4..F7FF and $FB94..FB97 and starts at $FFF9 as before. The log/antilog/sine tables all remain in their original form/location. The Parallax Copyright message contained in the ROM at $FF00..FF5F is now changed and located at $FBC8..FBF7.
The ROM identifies as Propeller Version 3.
DISABLE_ROM_FONT
The ROM Font may be disabled by defining DISABLE_ROM_FONT. The ROM font is located at hub $8000..BFFF. There is insufficient RAM space in the DE0-Nano so the FPGA must be built with this option defined.
ROM_FONT_WRITABLE
The ROM Font is built in the FPGA as RAM at $8000..BFFF. This permits this space to be used by programs as HUB RAM. Enable this by defining ROM_FONT_WRITABLE. The ROM will still be pre-loaded with the Font but the user programs may overwrite this.
ROM_HIGH_WRITABLE
The ROM containing the LOG/ALOG/SIN and INTERPRETER/BOOTER/RUNNER code is built in the FPGA as RAM. This permits this space to be used by programs as HUB RAM. Enable this by defining ROM_HIGH_WRITABLE. Currently all the HUB at $C000..$FFFF will become writable, although I am thinking about perhaps protecting the interpreter/booter/runner code block $F000..FFFF and just permitting the block $C000..EFFF as writable. The ROM will still be pre-loaded with the log/alog/sin and interpreter/booter/runner code.
Update 13May: Writeable section is now only $C000..EFFF although I have not updated code below.
HUB_SINGLE_CLOCK
The P1V may be built with the HUB ACCESS as 1:8 clocks instead of the usual 1:16 clocks. To enable this, define HUB_SINGLE_CLOCK.
COGS_4
The P1V may be built with only 4 Cogs instead of 8 Cogs. When the P1V is built with 4 Cogs, the HUB ACCESS will be built with 1:4 clocks with HUB_SINGLE_CLOCK set, else it will be built with 1:8 clocks. Note that RDxxxx/WRxxxx still take 8 clocks, but will synchronise with the hub in 4 clocks when 1:4, resulting in faster hub accesses.
NO_VIDEO
The P1V may be built with the Video disabled. This results in a faster build and of course saves logic/power.
Currently, this disables video in all Cogs.
INVERT_COG_LEDS
The P1V may be built inverting the 8x LED outputs. This is required for the BeMicroCV build - this is done automatically when selecting the BeMicroCV project.
Hub ROM as RAM
In order to be able to use the HUB ROM as HUB RAM, I needed to rebuild the Intel Hex Rom files as Byte files. I have modified hub_mem.v accordingly. Files contain the filename appendices _b0, _b1, _b2 and _b3 for the respective bytes 0..3 hex files.
Update 15May2015: The initialisation files are now xxxx.mif format - built by Quartus and prevents Quartus warnings.
config.v
The file "config.v" contains these definitions, which are common to all DE0-Nano, DE2-115 and BeMicroCV builds.
Here are all files. Just unzip into a new folder and compile with Quartus II. Note I used Quartus 15.0.0.145 and the DE0-Nano project. Quartus gives either 14 or 18 warnings. The additional 4 are complaining about the format of the intel hex files for the unscrambled rom files using the wrong address format, although it works correctly.
Udate 15may2015: There are now 15 Warnings for the 4 Cog build.
Latest version...
P1V_4cog_20150515g.zip
Original version...
CleanTest14_20150511g.zip
Special thanks must go to Brian (ozpropdev) for his P1V Toolbox. I used this to create the Intel Hex format files, including the new command SAVEBYTE to save the files in byte form for the new hub rom byte format so that the rom can be used as ram.
http://forums.parallax.com/showthread.php/160690-P1V-Hub-running-4x-(4-cogs)-and-2x-faster-(now-1-4-1-8-was-1-16)
I have taken the latest base GitHub code (as at 5Mar2015) and added options to compile the code as follows...
NOT_SCRAMBLED
By default, the ROM is scrambled. By defining NOT_SCRAMBLED, the unscrambled ROM file will be used.
The scrambled ROM identifies as Propeller Version 1, the unscrambled ROM identifies as Propeller Version 2.
CLUSO_ROMHI
When defining CLUSO_ROMHI in conjunction with defining NOT_SCRAMBED, the unscrambled cluso ROM will be used.
The cluso ROM has my Faster Spin Interpreter with the $F000..FFFF section of the ROM reorganised so that the vector table used by my interpreter can be positioned at $FBF8..FFF7. The booter/runner/interpreter all still start at their original ROM addresses although the runner is now split into 3 sections $FFF8..FFFF, $F7A4..F7FF and $FB94..FB97 and starts at $FFF9 as before. The log/antilog/sine tables all remain in their original form/location. The Parallax Copyright message contained in the ROM at $FF00..FF5F is now changed and located at $FBC8..FBF7.
The ROM identifies as Propeller Version 3.
DISABLE_ROM_FONT
The ROM Font may be disabled by defining DISABLE_ROM_FONT. The ROM font is located at hub $8000..BFFF. There is insufficient RAM space in the DE0-Nano so the FPGA must be built with this option defined.
ROM_FONT_WRITABLE
The ROM Font is built in the FPGA as RAM at $8000..BFFF. This permits this space to be used by programs as HUB RAM. Enable this by defining ROM_FONT_WRITABLE. The ROM will still be pre-loaded with the Font but the user programs may overwrite this.
ROM_HIGH_WRITABLE
The ROM containing the LOG/ALOG/SIN and INTERPRETER/BOOTER/RUNNER code is built in the FPGA as RAM. This permits this space to be used by programs as HUB RAM. Enable this by defining ROM_HIGH_WRITABLE. Currently all the HUB at $C000..$FFFF will become writable, although I am thinking about perhaps protecting the interpreter/booter/runner code block $F000..FFFF and just permitting the block $C000..EFFF as writable. The ROM will still be pre-loaded with the log/alog/sin and interpreter/booter/runner code.
Update 13May: Writeable section is now only $C000..EFFF although I have not updated code below.
HUB_SINGLE_CLOCK
The P1V may be built with the HUB ACCESS as 1:8 clocks instead of the usual 1:16 clocks. To enable this, define HUB_SINGLE_CLOCK.
COGS_4
The P1V may be built with only 4 Cogs instead of 8 Cogs. When the P1V is built with 4 Cogs, the HUB ACCESS will be built with 1:4 clocks with HUB_SINGLE_CLOCK set, else it will be built with 1:8 clocks. Note that RDxxxx/WRxxxx still take 8 clocks, but will synchronise with the hub in 4 clocks when 1:4, resulting in faster hub accesses.
NO_VIDEO
The P1V may be built with the Video disabled. This results in a faster build and of course saves logic/power.
Currently, this disables video in all Cogs.
INVERT_COG_LEDS
The P1V may be built inverting the 8x LED outputs. This is required for the BeMicroCV build - this is done automatically when selecting the BeMicroCV project.
Hub ROM as RAM
In order to be able to use the HUB ROM as HUB RAM, I needed to rebuild the Intel Hex Rom files as Byte files. I have modified hub_mem.v accordingly. Files contain the filename appendices _b0, _b1, _b2 and _b3 for the respective bytes 0..3 hex files.
Update 15May2015: The initialisation files are now xxxx.mif format - built by Quartus and prevents Quartus warnings.
config.v
The file "config.v" contains these definitions, which are common to all DE0-Nano, DE2-115 and BeMicroCV builds.
Here are all files. Just unzip into a new folder and compile with Quartus II. Note I used Quartus 15.0.0.145 and the DE0-Nano project. Quartus gives either 14 or 18 warnings. The additional 4 are complaining about the format of the intel hex files for the unscrambled rom files using the wrong address format, although it works correctly.
Udate 15may2015: There are now 15 Warnings for the 4 Cog build.
Latest version...
P1V_4cog_20150515g.zip
Original version...
CleanTest14_20150511g.zip
Special thanks must go to Brian (ozpropdev) for his P1V Toolbox. I used this to create the Intel Hex format files, including the new command SAVEBYTE to save the files in byte form for the new hub rom byte format so that the rom can be used as ram.
