Open Propeller Project : Soft-Propeller 40P14
alukats
Posts: 39
Open source hardware project suitable for custom Proppeler 1 Verilog Code derived SoC development.
Main Features planned for Rev 1:
* DIP40 form-factor, pinout compatible to P8X32A DIP40
* DIP14 socket for add-on boards and adapters
* 3.3V single supply
* FPGA large enough to hold Propeller 1 code, and custom extension and peripheral IP cores
* up to 16MByte flash to hold custom Propeller hardware configurations and software images
* microSD card for flash updates and file storage
All hardware production files made with Altium Designer will be released under open hardware license.
Main Features planned for Rev 1:
* DIP40 form-factor, pinout compatible to P8X32A DIP40
* DIP14 socket for add-on boards and adapters
* 3.3V single supply
* FPGA large enough to hold Propeller 1 code, and custom extension and peripheral IP cores
* up to 16MByte flash to hold custom Propeller hardware configurations and software images
* microSD card for flash updates and file storage
All hardware production files made with Altium Designer will be released under open hardware license.
Comments
If it could be powered and programmed from an on board micro USB port that would be great.
I have to question the choice of Altium Designer. AD is a closed source, expensive, Windows only program. Open sourcing AD files seems kind of pointless. Certainly not useful to non Windows users.
http://www.oshwa.org/definition/
If you read the definition carefully then it says: "ideally the tools would be open source ones" there is no requirement that they are and in many cases they can not be. The FPGA tools as example are not, so there is not possible to be ideal in that sense anyway. As of AD vs KiCad, well I do what I can, and that includes design files in original format. Of course the production files needed to duplicate the hardware will be available as well, so that the same design could be replicated without the need to use AD.
Design tools to compile the P1 verilog are free, but not open sourced.
As of on-board micro-USB, well it is not planned directly, from following reasons:
P32X8A DIP, was and is passive, e.g. it expects power from the base and not other way around. Providing power from propeller to base would break that, and require special circuitry and switching to choose where power is coming in and going out.
If the design expects 3.3V power from base, then it is safer and easier solution.
MicroUSB is fragile, no matter how you glue it or try to protect, it will be teared off the board sometimes.
There is DIP14 socket slot on the DIP40 module itself, one of the add-ons would be microUSB UART and power add-on.
This makes more sense to me than adding the USB directly on 40P14
I was not really looking at the Altium issue from the point of view of adhering to the letter of any particular license. But rather form the view that it flies in opposition to the movement toward open source. It's a shame to bump into the dead end of needing a closed source tool when so many have provided open source along the way to get you there. Parallax has made huge efforts to open the tools in recent years with propgcc, openspin, PropellerIDE, the Propeller Verilog code itself and so on.
As a practical matter I do appreciate that there is a lot you cannot do in the hardware world without proprietary tools. As you said one cannot program an FPGA without closed source tools. However in the PCB space we do have options.
Anyway this is not a big deal and I don't want to make a fuss about it.
I do take your points about USB. This sounds like it's going to be a great little board. Sign me up for one!
Dave Jones has been kicking it's tires and discussing it here: http://www.eevblog.com/forum/altium/free-altium-is-coming/105/
Sadly it seems to depend on using "cloud" storage at Altium. No saving files locally. And no exporters to different formats.
Worse still its a Windows only app.
All that makes no sense when they claim that one if it main points is to create a user community around it for library and PCB design sharing.
It will be interesting to see if Altium gain any traction with this.
Base boards and add-on boards all can be made with open-source CAD tools, we hope to provide some templates for that in the case the community does not.
TBH I would agree with you on all points, if there would be AI PCB CAD, as my younger son tells me I should make: a CAD with AI, that looks WHAT you do (on the PCB) learns from you and then assists you. I could make this tool within less than 3 years. Maybe I will have the chance to-do it. With the power of the PC's it is no longer anything complicated. I started to work with PCAD on self-made PC clone with i8088 CPU with the PCAD overlays loading from second floppy drive that was SUBST to look like hard-disk that I could not afford to buy. Back then it was complicated to make a CAD Application. Now its different. But thats off topic here.
Back then was before Windows and 32 bit processors. CADSTAR was written in PLM/86 for MSDOS, a lot of messing with 64K segments and bazillions of overlays were required for such a large program. It was amazing it worked as well as it did.
More amazingly Racal created a translator to convert all that PL/M source into C and hence get the thing running on Windows when that arrived.
I'm curious as to what you would have the AI do in your CAD system.
DIP40 pin-mapping:
P0..P7: general purpose single ended FPGA I/O normally mapped to propeller P0..P7
P8..P15: general purpose single ended FPGA I/O normally mapped to propeller P8.P15, or in odd-even pairs used as analog input (4 analog in total)
P16..P23: general purpose single ended FPGA I/O normally mapped to propeller P16..P23
P24..P31: general purpose single ended FPGA I/O normally mapped to propeller P24..P31
P8..P23 are routed as differential pairs and can be used in odd-even pairs as LVDS input or TMDS/HDMI output
XI, XO: general purpose single ended FPGA I/O, or LVDS input, XI is FPGA global clock input
P30, P31 have parallel connection to ARM UART to be used as uart bootloader, so they are dual access pins.
DIP14 pin-mapping:
First It is tailored like squeezed DIP40 propeller, the GND-VCC pins are in diagonal arrangement so that incorrect (180 degrees) insertion will not blow your electronics.
X0 X7
X1 X6
GND 3.3V
AIN AOUT
3.3V GND
X2 X5
X3 X4
AIN is single ended analog input
AOUT is DAC made of 4 resistors, can also be used as single ended digital input or output
X0,X1, X4,X5 are ARM I/O (UART, I2C, GPIO)
X2,X3, X6,X7 can be mapped to Propeller IO pins
Thats the plan. Initially there was 3.5mm audio jack on the board, but that is off now, there are too many complications with the audio jack.
The DIP14 with Propeller style pin-mapping offers so much more.
pin-headers are displayed either pin-header male-or-female or then DIP sockets/strips can be used
Alukats, you should edit the first post and add a link to your website where people can find more information about it.
===Jac
there is currently no other place as here for the spec and infos, it will be up during the next week. I do have hardware ready to be used for initial testing, but it has different form-factor and set of features.
As the more detailed spec are online i post here for preview, the public-public release is planned late december. So the this forum is currently primary info for the 40P14 - name preliminary in the lack of better ideas.
Really looking forward to seeing more information and hope you get enough interest to get a good production run going.
Ah, no fear about lack of interest, we run the production anyway.
Only the price we can offer depends on the interest and sales volumes.
Xilinx has **** step pricing model, so even you commit buying a lot for the "first steps" you pay a lot.
So if we offer the "final target price" from day one, that means selling with profit losses, for the first 1K pieces.
We run the first PCB runs on prototype fab that delivers multilayer (we order 14-16 layers there) in standard delivery of 4 working days.
The price is good for that delivery time, but for production qty the prices are too high. So it all has to accumulated in the production volume, when it comes.
But the DIP40 with the PROP pin-out it looks really good.
DEJAVU: I have done this once before, DIP40 modules, one with Spartan3-1000 one with Virtex4-FX12, that was real disaster as the price was set sky-high at that time. I have those modules on my desk right now.
Will not happen any more
In regards to using Altium for an "open source" project, I have no concerns. While the raw design file would need Altium software which is expensive, Altium does export several CAD formats that retain a high level of integrity of the design and each can be imported into DipTrace or Eagle. From my experience as an EMS provider (contract manufacturing) for the past 14 years, I have seen designs in multiple formats. Rarely do we see native design files from customers, but that does not stop us from doing everything necessary to manufacture the product. If we wanted to modify a product, we could utilize one of the CAD files to bring into either DipTrace or Altium (we own full versions of both) and regenerate the design. Same goes for schematics. If they are providing in a format that can be shared with other systems, we can regenerate the schematic in DipTrace or Altium. There may be some components that may need additional edits (IE: components new to the database), but all in all, it would not be a showstopper for anyone. If you release a full export of data as a complete package, that would still be fully useful. Complete would be BOM, CAD data, IPC-D-356 Netlist, Gerbers, Assembly and fab drawings, and pick-n-place file.
DIP14 is a good idea, but so too is Micro USB, especially if you can 'get at' the USB in the FPGA.
MicroUSB can come with thruhole mounting, so you can choose the best mechanical solution.
I also see FTDI have 0.3" 16 pin modules, so another approach would be to nudge the DIP14 to DIP16 and so match their pinout
let me try this way: DIP16 would also fit, but then I could not any more fit the si1143 IR sensor and RGB led, or it would be very very tight on placement.
The DIP14 is made "symmetric pinout" same as Prop DIP itself, I really like this, and would like to keep it. Going for FTDI DIP16 would brake that
to WBA
Also what model of Xilinx FPGA are you planning here? the Zynq 7020 is a big step up in functionality because of extra block ram and LE's. Perhaps offer two options?
Finally, how about having the 14pin DIP user selectable between IO and a JTAG port via a jumper or switch?
1) if doing DIP40 form factor with T/H pins then there is only one Zynq package option, CLG225 and only one device 7010, no choices. 7020 is way larger package, and would only be doable when using SMD pads on the bottom PCB, but this means that special plastic DIP adapter has to be used always - i have been that route once, with nto so good memories
2) JTAG, I almost agrree but somewhere have to compromise, I tend more to have 8 I/Os in DIP14 routed as differential pairs
I am using in many design Lattice XO2 as "system controller" that bypasses the JTAG (using XO2 built in JTAG mux mode), this could be considered here too, but than, well it limits the IO programmability, adds complexity and cost too.
https://wiki.trenz-electronic.de/display/OSHW/Xmod-USB-X
this is "universal FT2232H" based JTAG or JTAG+UART + Reset or
I am also working on "one pin JTAG"
please do understand this: the DIP40 softprop is not "generic FPGA evaluation tool", its is system components that runs customized propeller core (or u imaginel..) - JTAG debugging is not primary
but I will consider and think about this.
Propeller core is running on Xilinx ARTIX design made with Vivado
There is still some work to be done do convert the hub memory to AXI connected BRAM, etc but eh really nice, hey ... this is FIRST time I ever see propeller working
I have programmed BS1, BS2 and SX but never a prop until today!
That way all you need to do is have the pins that they connect to selectable via jumpers. That should take no room at all.
For me the big benefit of this over the regular prop would be the ability to change the function to tailor requirements using the Vivado tools.
Is it pretty straightforward producing BiT files in Vivado?
BIT file generation is simple yes
I have seen your Zynq module on Indiegogo. I really like it, but I am worried that if I pay 39 Euros maybe I am stealing your money (considering the price of the FPGA itself).
Is it possible to make a lower cost version with the non-zynq Artix 7 (XC7A35T-1FTG256C)? (Digikey list this one as $35 USD.)
I am a big fan of small FPGA modules like TIF (Bugblat.com), Craignell (Enterpoint.co.uk) and Mercury (micro-nova.com). But I consider them either too small (not TIF doesn't have enough IO pins) or too expensive (craignel and mercury).
What do you think about the 8x8mm 132-BGA from lattice (MachXO2, XP2, ICE40)?
Or even the old Xilinx XC3S100E/XC3S500E (132-BGA) and spartan-6 (8x8mm 196-CSPBGA)?
Altera has also a nice Cyclone IV GX with transceiver with only 11x11mm 148-QFN and great price.
Is it worth, or It could be possible to make some cheap DIP module with any them?
With the new Raspberry Pi 2 just released I may be able to use one of your 40P units, with a custom P1V setup, and get the performance I was hoping for from my prototype board. The P1 on it was very close to hitting the desired level with the original Raspberry Pi being the main bottleneck.
https://hackaday.io/project/6786-soft-propeller
https://hackaday.io/project/6786-soft-propeller
Good to see you back!