BS2 PWM PIC implemenation

manitou

Just curioius: what are the PIC instructions used on the BS2 for implementing the PWM instruction? I've read that for the 20MHz BS2, PWM at 50% duty cycle has a pulse width of 4.5us. It would seem that a tight PIC loop could toggle a pin at 1.6us ...

inquring minds

JonnyMac

The PIC used on the BS2 does not have native PWM -- it is being bit-banged. Remember, too, that one can optimize hand assembly for individual projects, but the assembly code used for the BS2 interpreter must be more general purpose.

Phil Pilgrim (PhiPi)

Also remember that "PWM" on a BASIC Stamp is not real PWM, but a DUTY-mode output. If you look to see how DUTY mode is implemented by the Propeller counters, you might get a good idea how it's implemented in the BS2's firmware.

-Phil

manitou

Well, I'm trying to guestimate the accuracy of the BS2 20mhz oscillator (it's a fetish). I figured I could count PWM pulses and measure time over a cycle with another MCU. The width of a pulse would need to be related back to the number of PIC instructions/cycles -- hence the request for the underlying bit-banging code of the BS2 firmware. I think the oscillator is spec'd at 0.5% to 1%.

Always hopeful, I realize this would require an engineer with access to firmware code and willing to provide the code snippet or cycle count, and presuming not a gross violation of proprietary information.

tick tock tick tock

Tracy Allen

When the PWM is set at 50%, that is,
PWM myPin, 128, 255
the output frequency is close to 111 kHz. It is a symmetric square wave.

With a 20MHz xtal, and a 5 MHz instruction rate, that comes out to 45 instructions. (5 MHz / 45 = 111.111_ kHz) In my online article about stamp PWM, I came up empirically with 111.3kHz, but the difference from 111.111 was probably due to individual Stamp variation plus measurement error.

That does seem like more instructions than would be necessary. It shouldn't have to read the EEPROM for the interpreter during execution. All that is required is repeated addition and transfer of the carry to an output pin. It also has to keep track of the cycle count. I don't have the code used, but possibly they slowed it down a bit on purpose.

manitou

thanks Tracy. I used your PWM article for my "4.5 us" pulse width value. They would pad (NOPs?) the inner pulse loop, so that its duration would be long enough so that an 8-bit counter loop could produce a 1ms PWM "cycle". Here's my PIC pseudo-assembly

                                      cycles
                    load r1,n4ms              to get 1 ms duration
              loop: bis                  1     pulse hi
                    3 nop's              3     balance pulse width
                    bic                  1     pulse lo
                    decskip              1     skip when r1 0
                     br loop             2

So that loop is 8 cycles, or 1.6us at 5 million ops per second. Too fast for an 8-bit counter to achieve a 1 ms duration. add NOPs

For what it's worth, I used logic analyzer @50Mhz to capture PWM 0,128,4 on BS2. I got pulse width of 4.4us, period of 8.8 us and frequency of 111.636 KHz. I couldn't see any change in the pulse train at the "cycle boundary" (1ms). The 4 cycle PWM pulse train lasted 4.505ms. The last pulse of the train was 16us high?