Parallax's FPGA board
rjo__
Posts: 2,114
Everything changes all the time... without change we die. The FPGA market seems particularly dynamic, doesn't it?
What made sense six months ago... might not make sense today. So, the question is about the Parallax FPGA board.
Does it still makes sense? Is it still going to happen?... is it too late to ask for features?
I am going to guess that the answer is yes to all of the above... but if it isn't too late, I would like to vote for two RAM chips,
I don't care what generation they are, I don't care how big they are or really how fast they are... just that there be two of them.
We are going to want to do all kinds of visual stuff and that is a lot easier if there are two identical chips rather than one big one.
What made sense six months ago... might not make sense today. So, the question is about the Parallax FPGA board.
Does it still makes sense? Is it still going to happen?... is it too late to ask for features?
I am going to guess that the answer is yes to all of the above... but if it isn't too late, I would like to vote for two RAM chips,
I don't care what generation they are, I don't care how big they are or really how fast they are... just that there be two of them.
We are going to want to do all kinds of visual stuff and that is a lot easier if there are two identical chips rather than one big one.
Comments
I am most interested in the here and now.
With what we have, I think the dual RAM is a must for some very interesting applications and desirable for others.
And right now we have more than enough potential ports.
But I am very, very interested in what happens with the P2... We aren't going to have (at least I hope we don't have) the sources for the P2.
As far as I know, if we have the image of P2 on the FPGA... that is pretty much all that is going to be on that FPGA.
But there is also no law that says that there can't be FPGA versioning of the P2 so that has a version might have more pins and more robust memory (and is offered as an FPGA_only P2 option).
The logic is that the P2 FPGA is very good way to start developing before the P2 chip gets produced. But if Parallax is going to the trouble to produce the board... doesn't it makes sense that they might want to promote sales of the FPGA product long after the P2 is done?... It makes sense to me that a good way to sell FPGA P2 boards and a good reason to buy an FPGA P2 board from Parallax is that the board provides additional capabilities beyond what is available in the silicon version.
And we shouldn't forget... the P2 is going to have very nice bandwidth. I don't have the expertise to know, but I wouldn't be surprised that it would be possible to match the P2 carefully to the right memory and with some magical switching, allow a single port to handle it all. Chip seems to excel at solving problems just like this. But I also wouldn't be surprised if that wouldn't work or that it does not belong in silicon.
There is RAM already inside the FPGA, and any dual-RAM design is going to raise the cost of a FPGA-Board.
So you would need to convince Parallax those niche cases made this worth while.
I could see a case for different types of RAM, and external memory access , but a straight duplicate is less compelling.
The MAX -10 release has also added another candidate for the emulation PCB, and interest falls off quite rapidly as price increases.
Perhaps what is needed is a suggested connected memory list for P2-FPGA ?
My suggested connected memory list for P2-FPGA would be
1) DRAM of whatever exact type P2 Silicon can drive (SDRAM, non DDR ? )
2) QuadSPI - small SO8 packages, so 2 of these allows byte wide SPI
3) Spansion HyperBUS *new* - Faster ~(ByteWide DDR SPI), small, so 2 footprints to allow future SRAM and FLASH.
4) Standard Async SRAM - size tbf
5) Boot Memory, treated as separate from above user memories.
The more the better... but honestly, 8MB x 2 would be just fine... 16 bit or better:)
It doesn't appear to have any RAM, apart from what is in the Cyclone chip.
Exactly, ( eg see my connected memory list in #4.)
If Parallax want/expect P2 to work with SDRAM, they really need the exact part on the FPGA board.
Plenty of gotcha's in SDRAM.
I also see no mention of a standard P2 Boot flash, but maybe that's just the DOC's ?
Perhaps Parallax can post a BOM, so users can see what ciomplete resource will be there ?
Maybe, but that looks to have long traces, and it also then severely limits users own add-on boards on the 0.1" expansion.
If it was my PCB design, I would have spun the FPGA+DACs rectangle 90', to match the PCB form factor, and give more room around the FPGA for BGA & SO8 memories.
The DE2-115 has plenty of SDRAM on it. So in a pinch a short cable is all we need... and Ebay has DIP adapters for about a buck.
The RAM on the FPGA can be configured as dual ported and there is plenty there.
?Any idea what this means: "The FPGA is configured by a Propeller 1 chip that stores your configuration image in a 64 Mb flash memory."
Chip said something about this a while back... and he has been incredibly quite lately:)
I am still trying to figure out how a Cyclone V is better than a Cyclone IV... any ideas?
The web info says
FPGA configured by Propeller 1
16-bit FPP for quick FPGA configuration loading
64 Mbit Flash memory stores FPGA configuration
Can download new FPGA configurations with PC application
FPGA configuration images downloaded via FTDI serial port
A common Altera combination is FT240X + MaxV CPLD, with the FT240X specs saying 1Mb/s
16bFPP is a parallel load mode, so the P1 replaces the MaxV, and can read from either FTDI (tbf) or 64Mb Flash
Parallax do not explicitly say what FTDI device they use ? (hopefully a FT240X.)
Speed info for Flash -> FPGA and USB-> FPGA would be useful.
Altera only supports 16-bit FPP on Stratix V:)