Registering INA (and INB)

Seairth

In the P2 design, Chip says that the I/O is now registered. I am wondering if we should do the same for the P1V.

Advantages:

• Inputs would now be buffered and consistent. In other words, it would not be possible for two cogs to see different values when the input is hovering near Vcc/2 (due to slight differences in the propagation delays of the signal in the FPGA).
• Hopefully, this would help overall fMax, because the path between the input and the register is about as short as it gets. Comparatively, the current P1V code must take into account the pin delays when setting the "s" register.
• Registered inputs provide a consistent drive strength to the rest of the circuit. This may help when increasing beyond 8 cogs.

Disadvantages:

• Increases register count.
• Adds a one-cycle delay to the inputs.

Incidentally, I also see that the I/O pins on the Cyclones have an input register built in, which can be enable by setting "Fast Input Register" to "On" in the assignment editor.


With my current code and SDC, here is what I get:




Slow (1200mv 85C model)


Original
fMax = 90.76MHz


Registered
fMax = 95.68MHz


Registered + Fast Input Register
fMax = 92.97MHz





As you can see, registering the inputs definitely make a difference. The unexpected part is that the use of "Fast Input Register" actually reduced fMax. I have no idea why.

jmg

Seairth wrote: »

... In other words, it would not be possible for two cogs to see different values when the input is hovering near Vcc/2 (due to slight differences in the propagation delays of the signal in the FPGA).

FPGA's are not going to like any input hovering near Vcc/2 , and two COGs can still report differing values in that case, as they can sample at different clock edges.
Testing/update of any PIN is always going to behave as registered already, because of how the opcodes work.

Seairth wrote: »

.
The unexpected part is that the use of "Fast Input Register" actually reduced fMax. I have no idea why.

Sometimes "Fast Input Register" are used to give tighter control of tsu,th, more than higher fMax.
I'm not sure what the Altera specs say on that.

rogloh

Build it a few times and see if the Fmax value changes... This difference might just be noise. I see it jump about by at least this amount each time even with the SDC file you provided.