Hub "API"

David Betz

I'm having a bit of a hard time figuring out some of the inputs and outputs of some of the P1 modules, in particular the hub. Some I can probably guess but others I'm not sure of. What do these parameters do?

clk_cog -- obviously just the system clock
ena_bus -- enable the hub? If this is zero does this essentially disable hub activity for that clock?
nres -- the reset line
r -- bus request?
e -- ??
w -- write vs. read?
s -- state? What do the values mean?
a -- address
d -- input data
q -- output data
c -- ?
bus_ack -- operation succeeded? Under what cases could it fail?
cog_ena -- COG enable? How does this work?
ptr_w -- ???
ptr_d -- ??
cfg -- ??

I'll admit that I could probably figure out some of these on my own but there are some that I can't. Can anyone tell me what these signals really mean and how they are used?

Thanks!
David (Verilog and hardware newbie)

cgracey

Here are the ones that needed some more explanation.

ena_bus -- high on every other clock, makes the hub run half the speed of the cogs
r -- high when cog is loading program, turns on ROM descrambling
s -- selects byte/word/long
c -- carry
bus_ack -- acknowledge back to cog that hub request completed
cog_ena -- 8 lines, each cog gets one, enables the cog if high
ptr_w -- write PAR during COGINIT
ptr_d -- data for writing PAR during COGINIT
cfg -- control bits set by CLKSET

David Betz

Thanks Chip! Reading this code is fun!