Access to cnt by mov vs. waitcnt

ksltd

I'm working on reducing jitter to zero in a fairly complex system. This requires some detailed understanding of the instruction pipeline with respect to the cnt register in both the mov instruction and the waitcnt instruction.

The waitcnt instruction has a minimum execution time of 6 clocks and a move from cnt has a fixed execution of 4 clocks. But there's no explanation of how the evaluation of cnt is done in either instruction, so its not possible to know how to get to-the-clock timing.

Said differently, consider the following three instructions:

mov A,cnt
add A,#x
waitcnt A,#0

What value of x is used so that the waitcnt instruction's execution takes the minimum 6 clocks? And, equally importantly, does that value cause the instruction to take exactly 6 clocks every time?



Thanks.

Phil Pilgrim (PhiPi)

I don't know the answer, but it would be very easy to determine experimentally. Put a write to a dira-enabled outa after the waitcnt, and keep decreasing x until the pin doesn't change right away. The value of x you seek will be the prior one.

-Phil

kuroneko

Either will work:

mov     cnt, cnt     ' current time
      add     cnt, #9{14}  ' minimal advance (to avoid full range delay)
      waitcnt cnt, #0      ' run-through

      mov     cnt, #5{14}  ' minimal advance (to avoid full range delay)
      add     cnt, cnt     ' current time
      waitcnt cnt, #0      ' run-through

ksltd wrote: »

And, equally importantly, does that value cause the instruction to take exactly 6 clocks every time?

Provided it's the same value (e.g. 9), yes.

ksltd

Kuroneko,

Did you make some typos in the code snippets, above? cnt is read-only, so I have a hard time believing they're correct. What's the scoop?

Also, did you derive the "9" by trial and measurement or do you have some empirical knowledge?

Thanks

kuroneko

ksltd wrote: »

Did you make some typos in the code snippets, above? cnt is read-only, so I have a hard time believing they're correct.

cnt is only r/o in the src slot of an insn, using it in the dst slot accesses its shadow companion which is perfectly r/w. But feel free to use an ordinary register. The code listed above works as is.

ksltd wrote: »

Also, did you derive the "9" by trial and measurement or do you have some empirical knowledge?

Pure blackbox observation. IOW the timing was the easy part, figuring out the sample points for live registers and wait* took a bit more but wasn't rocket science. It's outdated (as in incomplete) by now but most of the stuff is listed here.