New possibilities
pik33
Posts: 2,366
What I attached is my good old Propeller player using vga, keyboard, SD card and SID emulator. I am using its video driver to test my FPGA environment.
(if someone want to try it, use BST to compile, or you will get a message it cannot fit in 32 kB)
but
at now I have the Propeller running stable @140 MHz (the wall is now 150 MHz - Chip gives some advices how to move it higher, but I have to learn this timing setting tool I didn't use before). Having a 140 MHz Prop, VGA Nostalgia driver may (1) fit in 1 cog or (2) go to 1024x768 resolution.
Then the SIDCog. It is running @32 MHz. 140 MHz Propeller should allow it to run @64 kHz and it means less aliases and more clear sound.
The sound should be no more generated via PWM, as we have a real soundchip od DE2-115. Driver needs to be written.
So the goal is:
- to recreate PropPlay fully using 1024x768 vga and 64 kHz SID in DE2-115 without any additions, except eventually, 24c256 added on GPIO
About licensing, I received an answer from Chip
so, to not make a mistake
please confirm if I can put my Propeller FPGA GPL code based projects here
In the meantime I'll start to write a driver for WM8731 chip to make it play.
(if someone want to try it, use BST to compile, or you will get a message it cannot fit in 32 kB)
but
at now I have the Propeller running stable @140 MHz (the wall is now 150 MHz - Chip gives some advices how to move it higher, but I have to learn this timing setting tool I didn't use before). Having a 140 MHz Prop, VGA Nostalgia driver may (1) fit in 1 cog or (2) go to 1024x768 resolution.
Then the SIDCog. It is running @32 MHz. 140 MHz Propeller should allow it to run @64 kHz and it means less aliases and more clear sound.
The sound should be no more generated via PWM, as we have a real soundchip od DE2-115. Driver needs to be written.
So the goal is:
- to recreate PropPlay fully using 1024x768 vga and 64 kHz SID in DE2-115 without any additions, except eventually, 24c256 added on GPIO
About licensing, I received an answer from Chip
I guess what we must do is make an exception for GPL when it involves some Parallax open-sourced project. I agree with you. Don't take your code down. I'll make a post to explain.
so, to not make a mistake
please confirm if I can put my Propeller FPGA GPL code based projects here
In the meantime I'll start to write a driver for WM8731 chip to make it play.
zip
58K
Comments
... and I made an error giving it PLL 280 MHz clock which is high over its specs... It is strange it still works... need to correct this
WOW, that's very good! So almost double the original performance then?
Maybe the PLL isn't up to running frequencies over 280Mhz. I'm not sure the spec's for the DE2-115 Cyclone chip.
And how does this work with timing for VGA/TV or other signals? Must the programs be rewritten for each stepping when overclocking?
I'm not really into the details about COG/HUB-programming just yet..
Video driver for vga only needed this:
_clkfreq = 140_000_000 instead of 80_000_000
The buffer as it is now was created for NIOS and it has 32bit parallel input. This is not good for a Prop
I've been trying to get PortB going on the DE0-nano today but Quartus (13.1 on Win 7 32 bit) has been giving me grief
It has crashed a few times and my project file seems to get corrupted. Very annoying.
PortB on a nano would work nicely as it has two 40 pin connectors.
Yes, we will be amending the Forum Rules to allow GPL code.
This is on our agenda for this week, but go ahead and make yourself at home in the meantime.
Ken Gracey
To all,
I think it might be prudent to ensure all verilog code posted (unless its a snippet) has the Parallax GPL3 text attached as part of the file or code posted here. This could avoid any problems down the track.