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Placing sigma delta components on proto board (#32810) - Page 2 — Parallax Forums

Placing sigma delta components on proto board (#32810)

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Comments

  • Alex.StanfieldAlex.Stanfield Posts: 198
    edited 2014-06-25 17:15
    ...
    It does have limitations though, drift being one of them when it comes to DC measurements such as a thermistor.

    How bad can that be and what does it depend on? Do we have an order of magnitude for it?

    Alex
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2014-06-25 18:55
    I'm curious about that, too. My guess is that it's the input logic threshold that can vary slightly over time.

    -Phil
  • Alex.StanfieldAlex.Stanfield Posts: 198
    edited 2014-06-25 20:17
    I'm curious about that, too. My guess is that it's the input logic threshold that can vary slightly over time.

    -Phil
    Interesting. Then, could it be compensated by calibrating periodically?

    Alex
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2014-06-25 20:28
    Then, could it be compensated by calibrating periodically?
    Sure, if you have an accurate voltage reference or stable Vdd. In fact, Parallax's S2 robot incorporates this capability via analog multiplexing with Vdd and Vss inputs, in addition to all the stuff it has to monitor.

    -Phil
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2014-06-26 05:59
    Good, I'm starting to see the light. If the "natural" sigma delta fails maybe I'll try this one.

    I'm only needing to calculate the temperature of a thermistor that will slowly change (max 6°/sec) so that could be a winning solution, thanks!

    Alex

    I am learning along with you. I had never considered that for many slow samplings, less that perfect wiring will do nicely. The reality is that in most cases I don't need to push the Propeller to the limit == there is usually the ability to do things a bit slower and there is usually code space and cogs left unused.
  • Tracy AllenTracy Allen Posts: 6,664
    edited 2014-06-26 08:10
    Just to expand on what Phil said about using Vdd and Vss as the reference voltages. For your thermistor, you can include a stable reference resistor in your circuit and tie it to an extra output pin that can be high or low, or input. Then the current at the summing junction is ratiometric between your thermistor (which is connected from the junction to ground) and the reference resistor. Drift in the Prop drops out of the equation. This depends on having resistance values large relative to the output resistance and pullup/down capability of the Prop pins.

    The intrinsic drift is mostly due to the change in the threshold voltage of the Prop with temperature, change in the output resistance curves of the pmos and nmos output transistors. In addition to external temperature changes, the self heating of the Prop comes into play. Locally on the chip, the sigma-delta technique runs the nmos and pmos output transistors dead on at their switching point, where they are drawing current and locally creating heat, which then sloshes around within the chip.

    For the Prop 2, word from Chip is that it will include bits that allow that calibration connection with an internal resistor. I'd hate losing the direct external connection to the summing junction though.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2014-06-26 09:07
    I'd hate losing the direct external connection to the summing junction though.
    I must've missed that tidbit from Chip. I would also hate losing access to the feedback pin and the ability to select my own feedback components, e.g. diodes for log response.

    -Phil
  • Alex.StanfieldAlex.Stanfield Posts: 198
    edited 2014-06-26 10:37
    Just to expand on what Phil said about using Vdd and Vss as the reference voltages. For your thermistor, you can include a stable reference resistor in your circuit and tie it to an extra output pin that can be high or low, or input. Then the current at the summing junction is ratiometric between your thermistor (which is connected from the junction to ground) and the reference resistor. Drift in the Prop drops out of the equation. This depends on having resistance values large relative to the output resistance and pullup/down capability of the Prop pins.

    The intrinsic drift is mostly due to the change in the threshold voltage of the Prop with temperature, change in the output resistance curves of the pmos and nmos output transistors. In addition to external temperature changes, the self heating of the Prop comes into play. Locally on the chip, the sigma-delta technique runs the nmos and pmos output transistors dead on at their switching point, where they are drawing current and locally creating heat, which then sloshes around within the chip.

    For the Prop 2, word from Chip is that it will include bits that allow that calibration connection with an internal resistor. I'd hate losing the direct external connection to the summing junction though.
    I'm understanding that for getting the drift out of the equation I have to take two different measures anyway (one with the pin as input and the other as output). Just like the calibration scheme in the app note. right?

    Alex
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2014-06-26 10:50
    Alex, you need to take two readings with output: one at logic high (Vdd); the other a logic low (Gnd).

    -Phil
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