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DE0-Nano P16X64 emulation question and request — Parallax Forums

DE0-Nano P16X64 emulation question and request

Bill HenningBill Henning Posts: 6,445
edited 2014-06-13 02:26 in Propeller 2
Hi Chip,

- How many cogs will fit in a DE0-Nano?

- Could you make a "bare" Nano image, which has 64 I/O's (without the video daughter board)?

Thanks,

Bill

Comments

  • mindrobotsmindrobots Posts: 6,506
    edited 2014-06-10 14:56
    Pretty please??

    +1 for Naked Nanos!!
  • TubularTubular Posts: 4,693
    edited 2014-06-10 18:52
    I think Chip said 4 cogs should fit in a DE0. That makes going from a 4 task old P2 cog easy (just split the tasks into a cog each).

    Whether that's still easy with the new memory arrangement, I don't know for sure.

    The DE2 figures Chip quoted the other day indicate ~4600 LE's per cog, then add the FIFO(s), perhaps 3 or 4 should fit.

    I wonder whether a single shunt (like for video pll) could switch the upper 32 pins between standard GP I/O and dac i/o. Jumper off/removed for DAC mode to maintain compatability with existing setups, and jumper on if you want those as GPIO
  • jmgjmg Posts: 15,171
    edited 2014-06-10 20:13
    Tubular wrote: »
    The DE2 figures Chip quoted the other day indicate ~4600 LE's per cog, then add the FIFO(s), perhaps 3 or 4 should fit.

    Once the smart-pin logic is added, I would guess 3 COGs in a Nano, with 24 Smart Pins (Paired?)
    The larger FPGA should have room for 64 smart pins
  • cgraceycgracey Posts: 14,134
    edited 2014-06-11 22:25
    jmg wrote: »
    Once the smart-pin logic is added, I would guess 3 COGs in a Nano, with 24 Smart Pins (Paired?)
    The larger FPGA should have room for 64 smart pins

    This is probably how the DE0-Nano will go - 3 cogs with hub and smart pins.

    I can make a few variations -one for the DE0-Nano add-on board that we made and one for the raw setup.
  • jmgjmg Posts: 15,171
    edited 2014-06-11 23:40
    cgracey wrote: »
    This is probably how the DE0-Nano will go - 3 cogs with hub and smart pins.

    I can make a few variations -one for the DE0-Nano add-on board that we made and one for the raw setup.

    .. and a build for the BEMICRO CV ( I see currently @ $34.79 ) when you have those done ?
  • Bill HenningBill Henning Posts: 6,445
    edited 2014-06-12 06:50
    Tubular, jmg:

    - you guys calleed it! 3 cogs

    Chip:

    Sounds great! Looking forward to it.

    DE0-Nano image for the DAC board will go to VGA/component video testing
    DE0-Nano raw 64 I/O will be great for other testing
    DE2-115 will be luxurious :)

    Now I'll just have to figure out some way of networking them...

    jmg:

    Granted, I did not log in (can't find my password) but Arrow currently shows $49.95

    http://parts.arrow.com/item/detail/arrow-development-tools/bemicrocv#RGM2

    http://www.altera.com/b/nios-bemicro-evaluation-kit.html

    http://www.altera.com/products/devkits/cyclone-index.jsp
  • Bill HenningBill Henning Posts: 6,445
    edited 2014-06-12 13:30
  • TubularTubular Posts: 4,693
    edited 2014-06-12 14:58
    3 cogs would be great for learning. Two cogs for programs and testing inter cog communications. And the monitor running in the third.

    If I were parallax, I'd be pretty nervous about enabling a ~$30 board to be able to run their IP, especially at this stage, and especially for free. Significantly constrains room to maneuver for any future developments.
  • cgraceycgracey Posts: 14,134
    edited 2014-06-12 15:55
    Tubular wrote: »
    3 cogs would be great for learning. Two cogs for programs and testing inter cog communications. And the monitor running in the third.

    If I were parallax, I'd be pretty nervous about enabling a ~$30 board to be able to run their IP, especially at this stage, and especially for free. Significantly constrains room to maneuver for any future developments.


    I think it would only whet people's appetite for the actual chip that would have all the analog I/O's, 512KB RAM, and 16 cogs. For $30, they could also buy a starter board with the actual chip, power supply, etc.

    Did I change your mind, at all?
  • jmgjmg Posts: 15,171
    edited 2014-06-12 16:35
    Tubular wrote: »
    If I were parallax, I'd be pretty nervous about enabling a ~$30 board to be able to run their IP, especially at this stage, and especially for free. Significantly constrains room to maneuver for any future developments.

    I don't quite follow your angle here ?
    Any FPGA board is going to be impractical for volume production, but great for 'seeding eyeballs' and it is those 'bums on seats' that are crucial to critical mass on things like software development.
    Commercial use will always use real silicon, as it does a lot more than a $35 FPGA Brick. - More RAM, more MHz, more COGs, ADCs, PLL...

    If you were meaning a Parallax FPGA board, by your " future developments", that depends on what parallax plan, but FPGA boards are always going to get more powerful and cheaper, over time.
  • TubularTubular Posts: 4,693
    edited 2014-06-12 18:11
    cgracey wrote: »
    I think it would only whet people's appetite for the actual chip that would have all the analog I/O's, 512KB RAM, and 16 cogs. For $30, they could also buy a starter board with the actual chip, power supply, etc.

    Did I change your mind, at all?

    Well, I guess you guys are serious about building chips vs modules, and its going to be fascinating how this plays out.

    Can we pre-order at that $30 price? : )
  • Cluso99Cluso99 Posts: 18,069
    edited 2014-06-13 02:26
    3 cogs on the DE0 will be fantastic. We can check out interactions between cog programs.

    I will be interested to see what ozpropdev comes up with this time around ;)
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