Is direct memory access supported

jdolecki

I don't even know what that is, but I read the Arduino duo supports if for high speed EEG data logging.

Can some one explain to me how it differs from SPI.

Has anyone use the ti ADS1299 eeg front end in a propeller project yet?

Thanks john

jazzed

DMA is a hardware assisted transfer mechanism. Propeller requires software (a PASM loop) to do the same thing. DMA transfers typically generate interrupts on receive ready and transmit complete. FullDuplexSerial serial driver is a "Pseudo-DMA" engine although far less complicated than the modern DMA engine. SPI could be handled the same way, but would not approach hardware assisted performance of other offerings. The next Propeller chip may be in a better competitive position.

Here's a good starting point for understanding what DMA is. Hold your nose while diving in.

Phil Pilgrim (PhiPi)

jazzed wrote:

DMA is a hardware assisted transfer mechanism. Propeller requires software (a PASM loop) to do the same thing.

This is a little bit misleading. Short answer: yes, the Propeller is capable of DMA. You can dedicate one of its eight processors to the task, and functionally it's no different from hardware-assisted DMA, since it occurs independently of other processes that may be executing in parallel. In many ways, each of the Prop's eight processors can be thought of as a microcoded peripheral -- a DMA processor being just one possible example.

-Phil

jazzed

LOL

Propeller "at best" can do Pseudo-DMA as I described.

The waitvid command can do a long at a time, so I guess that qualifies a little on the output direction as DMA, but 4 bytes barely qualifies as DMA. DMA does not require software for the process of transferring data. DMA does require software to set up buffers and trigger transfers for outputting bytes (waitvid). DMA is usually a receiving mechanism too. There is no such receive DMA in propeller without requiring software to actually do the transfer. This is why so many of us requested SERDES operation in P2. Alas, we are destined to get another "pseudo DMA" chip.

Phil Pilgrim (PhiPi)

The requirement of "software" does not disqualify the Prop as DMA-capable. Heaven knows now many so-called hardware DMA processors are actually microcoded. My point was -- and remains -- that funcitonally, regardless of speed, having a separate processor handle data transfer to and from the Prop's RAM makes that memroy access "direct" without intervention by software running in, say, the top-level program.

One signature example of DMA that we've all used is any one of the the video drivers. One cog has direct access to the text data in hub RAM and cycles through it continuously to send glyphs to the video output. The program that puts the text data in RAM does not need to intervene.

Saying that this is not DMA is like saying that the Prop has no UART when --- again funcitonally -- it has nearly as many as you could want. In fact, FullDuplexSerial is not only a UART but uses DMA to buffer and unbuffer data to and from hub RAM. IOW, the main program does not need to intervene every time a serial data byte comes in or goes out.

-Phil

Heater.

Indeed taken literally every COG has direct memory access to the HUB memory that every other COG is using.
Clearly there is no DMA into he COGs registers (except perhaps that WAITVID thing). But then I have never seem DMA into any other microprocessors registers either.

Back in the day Intel had the 8089 IO Processor chip. It was a coprocessor like the 8087 maths chip but designed offload IO. Basically DMA in software. We even designed one into an 8086 board. The 8089 did not catch on though.

http://pdf.datasheetcatalog.com/datasheets/1150/489358_DS.pdf

ErNa

As I believe, DMA can only take place if there is a memory and an I/O as separate building block. A DMA controller could generate I/O-read and MEM-write at one time slot, means, set I/O-Address, read from I/O data (place on the data bus) and the same moment a apply memory address and generate, mem-write, so data could flow from I/O to mem without CPU-intervention. Means: you need a data bus, address bus, separate io-rw and mem rw. How this works in practice depends on hardware, e.g. how fast can addresses change, what are lead and hold times, .. etc. DMA itself does not tell anything, how it is implemented. It might even be possible to move data from memory to memory or io to io, Or if there is mem-mapped io, as it is the case in a core called cog. Now it depends if you see "separate building blocks" as discrete chips on a PCB, oder mem- and io-boards placed on a bus, ... or just as sketched blocks on a piece of paper.

evanh

jdolecki wrote: »

Can some one explain to me how it differs from SPI.

I'll have a shot at this one. DMA, at it's heart, is a buffering mechanism. An SPI controller can use DMA as a means of storing/retrieving it's datastream instead of a FIFO. DMA is generally considered an improvement over FIFO as the buffer length and location is definable and can be large and the driver can direct the DMA engine to any pre-formatted soft buffer it chooses. Obviously it requires more hardware to function though.

Some people prefer to label this as "bus mastering" DMA and keep the straight label of DMA for an uncommon configuration of a centralised DMA controller.


EDIT: As others have pointed out, when a Cog is running as a soft device and, as it common in the Prop, it is filling HubRAM as it's end buffer then this can be considered the equivalent to DMA.

kwinn

DMA means Direct Memory Access, so it really doesn't matter if the memory is internal or external to the chip.

The early computers with DMA had input and output registers, a presettable counter for the address, a down counter for the number of memory locations to load, and a counter/decoder to generate the timing pulses that controlled the hardware. Some time later the counter decoder was replaced with microcode for the control hardware and it became a DMA controller or some such appellation.

No real difference between what those microcoded DMA controllers and a cog does, so the propeller does have DMA capability.

ErNa wrote: »

As I believe, DMA can only take place if there is a memory and an I/O as separate building block. A DMA controller could generate I/O-read and MEM-write at one time slot, means, set I/O-Address, read from I/O data (place on the data bus) and the same moment a apply memory address and generate, mem-write, so data could flow from I/O to mem without CPU-intervention. Means: you need a data bus, address bus, separate io-rw and mem rw. How this works in practice depends on hardware, e.g. how fast can addresses change, what are lead and hold times, .. etc. DMA itself does not tell anything, how it is implemented. It might even be possible to move data from memory to memory or io to io, Or if there is mem-mapped io, as it is the case in a core called cog. Now it depends if you see "separate building blocks" as discrete chips on a PCB, oder mem- and io-boards placed on a bus, ... or just as sketched blocks on a piece of paper.

shimniok

jdolecki wrote: »

I don't even know what that is, but I read the Arduino duo supports if for high speed EEG data logging.

Can some one explain to me how it differs from SPI.

In case it wasn't clear, SPI, Serial Peripheral Interface, is a full duplex synchronous serial data link (http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus). It uses four lines (not counting power): Master In, Slave Out (MISO), Master Out, Slave In (MOSI), Serial Clock (SCK), and Slave Select (SS).

I think DMA has been defined. Typically in the context of a Microcontroller, it's an onboard peripheral that transfers data from another peripheral to a block of memory automatically, saving processor cycles that would otherwise be used to read data from SPI and write it to memory. But typical MCUs don't have multiple cores or software peripherals like the Propeller.

I suppose the real question you want to ask is whether the Propeller has the throughput to support a project with the ADS1299.

evanh

It's a breeze to handle the throughput. EEG signals are very slow relative to many typical electrical signals. The ADS1299 is a precision device, not a high speed. Quote - "Data Rate: 250 SPS to 16 kSPS".

Comparable to thermocouple measuring.

jazzed

If you feel so strongly that Propeller has credible DMA with access to external devices (not pseudo DMA), then you should add it to the DMA wiki page. It will sit nicely under the Cell processor which does use DMA for allowing each core to access the others data.