Integrating Sigma-Delta ADC (for when you used capacitive coupling)
lonesock
Posts: 917
Hi, all.
I have a project that uses a DC-blocking cap in series with an incoming signal. This is great for getting rid of DC offsets, but it is effectively a high-pass filter / differentiator. This means that high frequency components (in the original signal, but also the ever-present noise) come through stronger. I wrote some code to numerically integrate the input stream, and wrapped it up in a little test package for use with the Demo Board. The code just takes the input from the on-board mic, samples and integrates it, then plays it back through the headphones. The integration really changes the sound. To try it without integration, in IntADC, comment out the line 194 ("wrlong B, par"). The tricky part was actually numerically blocking DC, since a running summation is a horrible place to keep adding a constant offset.
I'm including the base project here, and I also have another binary image you can try with an added effect that is very fun to play with, but I can't release the source code to that atm, sorry.
thanks,
Jonathan
I have a project that uses a DC-blocking cap in series with an incoming signal. This is great for getting rid of DC offsets, but it is effectively a high-pass filter / differentiator. This means that high frequency components (in the original signal, but also the ever-present noise) come through stronger. I wrote some code to numerically integrate the input stream, and wrapped it up in a little test package for use with the Demo Board. The code just takes the input from the on-board mic, samples and integrates it, then plays it back through the headphones. The integration really changes the sound. To try it without integration, in IntADC, comment out the line 194 ("wrlong B, par"). The tricky part was actually numerically blocking DC, since a running summation is a horrible place to keep adding a constant offset.
I'm including the base project here, and I also have another binary image you can try with an added effect that is very fun to play with, but I can't release the source code to that atm, sorry.
thanks,
Jonathan
Comments
Nice! Though I'd advocate a resistor in series with the input capacitor to stablize the gain over frequency.
I recall seeing a Philips scope circuit, that used an interesting trick of TWO signal pathways in the Pre-Amp.
They had a low frequency, low drift DC opamp ( IIRC up to 1KHz) and then an AC coupled FET amplifier that did 1KHz - 100MHZ+
That meant they could optimize each for the task, so maybe a similar approach would suit the Prop.
A high value resistor could drive a DC path, where the value is chosen for isolation more than bandwidth, and then a R-C series AC coupling could give faster responses.
I could see uses in Battery-stacks for example.
Suppose that it is fed by a low-Z source such as the output of an op-amp. The analysis is a simple application of KCL to the summing node, and the result is that the response of the instantaneous feedback is directly proportional to the rate of change of the input voltage. Gain for a sine wave is directly proportional to frequency and the R2Ci product. It hits the rails when dVi/dt = ±1.65 / R2Ci. Gain for a square wave or a step is infinite, that is, it saturates to the rails, either 100% or 0%. Why would you ever want to use that circuit? Maybe to square up a sine wave? To achieve the highest possible AC gain for a narrowband input? Part of a larger feedback loop?
On the other hand, put a resistor is in series with the input capacitor.
In the high frequency limit, the gain is R2/Ri with the output centered at half scale. The value of the capacitor can be increased in order to push the low frequency cutoff down, determined by the time constant Ri*Ci. Nicely determined and controlled.
The input impedance has to be accounted for, if it is not zero. I think a lot of microphone circuits work as well as they do because they have an output impedance of several hundred ohms, and that (left sort of to chance) determines the gain of circuit.
Here is the electret circuit of the demo board, with the 0.1µF input coupling capacitor. I haven't measured it, but my guess is that the output impedance of the electret circuit is pretty close to the 10kΩ of the pullup resistor, which if so would limit the high frequency gain to x10. The 0.1µF adds about 1.5kΩ at 1kHz.
@Tracy: The header is leftover from my SimpleADC code, which I used as a starting point, sorry. There is indeed a blocking cap right on the output of an op-amp. It keeps the output centered, but increases high-frequency noise.
@jmg: that's a pretty cool trick too!
The circuit is not mine, so I will present this thread to the creator. I really appreciate all your input...thanks!
Jonathan
P.S. Did anyone try out the octave drop demo .binary?
I tried the noise filter _test_IntADC program too, and can definitely see and drop in the noise frequency. Also compared it with Chip's original microphone to headphones program.