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start cogs with n+n clock cycles. — Parallax Forums

start cogs with n+n clock cycles.

eventsevents Posts: 27
edited 2014-02-27 11:20 in Propeller 1
Hello to all.
It is possible with p8x32:
n +0 clock cycle -> starts cog0
n +1 clock cycle -> starts cog1
n +2 clock cycle -> starts cog2
n +3 clock cycle -> starts cog3

another question:
have an output pin, and in the next clock cycle pass to input?
there is some waiting time in this situation?

thank you

Comments

  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2014-02-27 10:08
    Sounds like you are trying to SYNC multiple cogs together so that they run at some future counter value.

    I think the only sure way to do this is to pass the future timer value into the cog, where at the "top" of each cog you have a loop that suspends program execution until the counter has reached the target value.
  • Cluso99Cluso99 Posts: 18,069
    edited 2014-02-27 10:14
    It takes many clock cycles to start a cog - IIRC it is in the datasheet.

    I am guessing that you are wanting to get 4 cogs in sync staggerd by 1 clock apart. This is possible by using waitcnt. Be aware that hub accesses _ rdxxxx/wrxxx - will alter this.

    I wrote a datalogging program a few years back that sampled the input pins using 4 cogs spaced 1 clock apart. Not sure if I put it in the obex. Later I discovered a similar method had been used (by Beau ???) - it might also be in obex.

    BTW this can onlybe done using pasm.
  • eventsevents Posts: 27
    edited 2014-02-27 10:16
    Beau, and the second question.
  • eventsevents Posts: 27
    edited 2014-02-27 10:20
    Cluso99, yes, in assembler. And the second question.
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2014-02-27 10:24
    The second question I'm not sure... it would take some empirical testing with a scope... but it will take longer than one clock to go from an output to an input, much less read an input. each instruction takes 4 clock cycles with a few exceptions on some instructions. The exact moment (or clock cycle) after you send the command to read an input versus when the input is registered would need to be confirmed by testing.
  • eventsevents Posts: 27
    edited 2014-02-27 10:37
    So this is not possible?
    n -> cog0 pin is output
    n +1 -> cog1 puts the same pin in input


    There is only one cycle of clock difference.
  • eventsevents Posts: 27
    edited 2014-02-27 10:42
    All this to XOR all output cogs. Theoretically put 80 million points per second on the same pin.
  • Mike GreenMike Green Posts: 23,101
    edited 2014-02-27 11:08
    Re post #7 ... no, you can't do it. The reason is that input is the default I/O pin state. If a single cog has its output direction register bit for a pin set to 1, that pin is an output no matter what other cogs do. If another cog reads that I/O pin, it will get the output state. The Propeller Manual discusses this and there's a diagram of the effective logic involved. You could synchronize two cogs such that one cog turns off its direction bit and, one clock cycle later, another cog reads that I/O pin, but you can't do that repeatedly without quite a few clock cycles spent setting up the two cogs for it. You could synchronize 4 or 6 cogs to do this twice or three times, but, since it takes at least 4 clock cycles to execute most instructions, there's no way to repeat this without some significant pause between repetitions. Remember also that the Prop is pipelined and different things happen in each of the clock cycles of a cog. The input signal would be sampled at a different cycle than the output direction register would be changed. You have to take that into account in working out the synchronization needed.
  • eventsevents Posts: 27
    edited 2014-02-27 11:20
    Mike Green, thanks for the explanation.
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