Shop OBEX P1 Docs P2 Docs Learn Events
playing with serial transceivers — Parallax Forums

playing with serial transceivers

RamonRamon Posts: 484
edited 2014-03-22 10:21 in Propeller 2
Yesterday I spent three ours reading the 3500 lines of "Prop2_Docs". The sections called "PIN TRANSFER" and "SERIAL TRANSCEIVERS" are GREAT ! I have two questions. The first for all you gurus, (the second for myself):

1) Is it possible to use three serial connections with 1 cog DE0-nano?

How can I make a small full-duplex code that takes byte "x" from SERA, and send "x+1" to SERB?
and (viceversa) takes byte "y" from SERB and send out "y+1" to SERB.


So I mean: one serial connection for programming (propeller plug) + 2 serial applications (SERA & SERB).

Comments

  • RamonRamon Posts: 484
    edited 2014-02-25 00:51
    (Second question)

    Why serial transceivers are not designed to automatically send transfers in the background? (Like SETXFR that use WIDE/AUX and moves from/to PINs in the background.) Is it because we need a way to check completition/status? That is the reason why we have two type of instructions: blocking instructions (until completition) and single clock instruction that writes status to carry.

    I read that AUX memory already has pointers to make LIFO stacks. I wonder if AUX can also work as FIFO and in that case, if there is a way to make serial transfers in the background like SETXFR. What would be the pro/cons? (and if this makes the work easier forcommunications (like synchronous serial, SERDES, or even 8b/10b and CRC?)
  • SapiehaSapieha Posts: 2,964
    edited 2014-02-25 01:04
    Hi Ramon.

    Read on use FLAG's on serout, serin

    That send receive with no wait on them
    Ramon wrote: »
    (Second question)

    Why serial transceivers are not designed to automatically send transfers in the background? (Like SETXFR that use WIDE/AUX and moves from/to PINs in the background.) Is it because we need a way to check completition/status? That is the reason why we have two type of instructions: blocking instructions (until completition) and single clock instruction that writes status to carry.

    I read that AUX memory already has pointers to make LIFO stacks. I wonder if AUX can also work as FIFO and in that case, if there is a way to make serial transfers in the background like SETXFR. What would be the pro/cons? (and if this makes the work easier forcommunications (like synchronous serial, SERDES, or even 8b/10b and CRC?)
  • ozpropdevozpropdev Posts: 2,792
    edited 2014-02-25 01:06
    Ramon wrote: »
    Is it possible to use three serial connections with 1 cog DE0-nano?

    Ramon
    DE0-Nano will only support one counter, so only SERA is supported.
    In answer to your other question, multi-tasking would support 2 HW serial and 1 SW serial easily. :)
    Brian
  • cgraceycgracey Posts: 14,151
    edited 2014-02-25 01:30
    ozpropdev wrote: »
    Ramon
    DE0-Nano will only support one counter, so only SERA is supported.
    In answer to your other question, multi-tasking would support 2 HW serial and 1 SW serial easily. :)
    Brian


    Each SER has its own baud rate generator, so you can use both at once. They don't use the counters, at all.
  • RamonRamon Posts: 484
    edited 2014-02-25 01:43
    So it would be something like this?
    'Define two time slots
    SETTASK #%%10 
    SETTASK #%%1010101010101010  
    
    ORG
    
    JMP #A_to_B
    JMP #B_to_A
    
    A_to_B: SETSERA '(something)
            CLRP #    'output pin
    loopA:  SERINA  D
            ADD     D,#1
            SEROUTB  D
            'how many nops?
            JMP loopA
        
    B_to_A: SETSERB
            CLRP #    'output pin 
    loopB:  SERINB D
            ADD    D,#1
            SEROUTA D
            'how many nops?
            JMP loopB
    
  • ozpropdevozpropdev Posts: 2,792
    edited 2014-02-25 01:58
    Ramon
    You have 3 choices as to where you buffer the data.
    Cog ram, Aux ram and Hub ram.
    Take a look at the INDA/B,PTRX/Y and PTRA/B registers for use as buffer pointers.

    Edit: Yes that's basically it, no nops required though.
  • RamonRamon Posts: 484
    edited 2014-02-25 02:05
    Thank you Brian, I want to keep it simple. No buffer pointers, just a byte of COG RAM.

    Imagine that each task have only one hand (for task one everything it takes from A goes to B; for task 2: everything that comes from B goes to A).
  • cgraceycgracey Posts: 14,151
    edited 2014-02-25 02:20
    Ramon, it should look more like this:
    	org
    
    	jmp	#a_to_b
    	jmp	#b_to_a
    
    
    a_to_b	settask	#%%10
    	setsera	#something,#something
    
    :loop	serouta	v1
    	serina	v1
    	add	v1,#1
    	jmp	#:loop
    
    
    b_to_a	serserb	#something,#something
    
    :loop	seroutb	v2
    	serinb	v2
    	add	v2,#1
    	jmp	#:loop
    
    
    v1	long	0
    v2	long	0
    
  • ozpropdevozpropdev Posts: 2,792
    edited 2014-02-25 02:40
    With a small correction serina -> seroutb & serinb -> serouta
    And order changed so first pass doesn't send a zeoo byte.
    	org
    
    	jmp	#a_to_b
    	jmp	#b_to_a
    
    
    a_to_b	settask	#%%10
    	setsera	#something,#something
    
    :loop	serina	v1
    	add	v1,#1
    	seroutb	v1
    	jmp	#:loop
    
    
    b_to_a	serserb	#something,#something
    
    :loop	serinb	v2
    	add	v2,#1
    	serouta	v2
    	jmp	#:loop
    
    
    v1	long	0
    v2	long	0
    
  • AribaAriba Posts: 2,690
    edited 2014-02-25 03:21
    You also need to make the TX pins outputs. The simplest way is to use:
        CLRP  #Tx1
        CLRP  #Tx2
    
    And to try it on a DE0-Nano you need an older FPGA image (The one of End November should work). In newer versions SERB is removed.

    Andy
  • SapiehaSapieha Posts: 2,964
    edited 2014-02-25 03:24
    Hi Ariba.

    Read this post from Chip.

    http://forums.parallax.com/showthread.php/154230-playing-with-serial-transceivers?p=1245926&viewfull=1#post1245926

    SER have its own counters

    Ariba wrote: »
    You also need to make the TX pins outputs. The simplest way is to use:
        CLRP  #Tx1
        CLRP  #Tx2
    
    And to try it on a DE0-Nano you need an older FPGA image (The one of End November should work). In newer versions SERB is removed.

    Andy
  • RamonRamon Posts: 484
    edited 2014-02-25 03:42
    Thank you all for your help. I currently don't have the fpga, but in two weeks or so I think I could check the code. I want to have some fun !
  • AribaAriba Posts: 2,690
    edited 2014-02-25 03:43
    Sapieha

    This is what got removed for DE0:
    32x32 multiply
     64/32 divide
     square root
     [COLOR="#FF0000"]SERB[/COLOR]
     CTRB
     CTRA's function generator
    
    ... and I think in the last build also the output logic for CTRA.

    Andy
  • RamonRamon Posts: 484
    edited 2014-03-22 04:22
    I am having trouble connecting DE0-nano to a USB-TTL adapter.

    I don't have the PropPlug, I have two USB-TTL transceivers (one is CP2102 and the other is PL2303).

    CP2102 gets COM9
    PL2303 gets COM10

    I have tested p2load and PNUT at 9600 baud and both failed. (PNUT only with CP2102 because PNUT cannot count more than 9 :(

    I remember there was some post that said that only RX/TX are needed. Or do I need RESn connected to make it working?

    What I am doing wrong?
    400 x 533 - 213K
    500 x 400 - 179K
  • Cluso99Cluso99 Posts: 18,069
    edited 2014-03-22 05:23
    You require the reset signal, which comes from DTR. Proptool has an option to use RTS instead but I am not sure about pnut. While some have used just a cap on the P1 I would recommend you use the transistor circuit of the propplug.

    And remember, there is no SERB on the current DE0 build, so some examples above will not work.
  • RamonRamon Posts: 484
    edited 2014-03-22 05:48
    Then there is no way I'll do it with my current adapters as they only have RX/TX, Vcc, and Vss. Next time I will spend the money on a good one.
  • Cluso99Cluso99 Posts: 18,069
    edited 2014-03-22 06:05
    I tried one of the cheap ebay adapters - just soldered a wire directly to the dtr or rts pin. Worked fine on P1.
  • RamonRamon Posts: 484
    edited 2014-03-22 09:05
    Thank you Cluso, but I cannot do that. The PL2303 is hermetically closed in a plastic injection mold. And the CP2102 is QFN32 (5x5 mm), my eyes and my hand cannot solder that to a wire (and even if I could do it, I won't because its from a friend that lend me the cable and FPGA).
  • AribaAriba Posts: 2,690
    edited 2014-03-22 10:21
    You use the wrong pins to connect your serial adapter. The pins in your picture were used before the adapter boards, now they are different.
    See this thead for the right pins, or here.

    It should be possible to talk to the monitor without the Reset pin onnected (maybe you need to pull Reset high with a resistor). You also can load and start some programs with the monitor. Prop2Terminal for example has an upload feature that loads a .obj file from PNUT over the monitor, but I'm not sure if this still works after all the chances since I made Prop2Terminal.

    Andy
Sign In or Register to comment.