A few questions about the Propeller 2
Private19872
Posts: 61
I'm rather new to the forums and after reading in the Prop 2 forums I had a few questions about the Prop 2's capabilities and it's development.
I've seen people using the term FPGA. After looking up what it means, I wasn't sure, but I thought it meant a circuit that you can program connections between logic gates. Is that correct and if so, does that mean that people are testing the Propeller 2 by programming it's circuitry into an FPGA?
I heard the Prop 2 memory would be 256 KB. Does that mean that you would be able to have more colors per tile, or higher resolution graphics, or is that controlled by the hardware?
Finally, I thought I read something about the Prop 2 having floating point support in the hardware, but I don't see it on the specifications list I found (here). Where can I find the most up to date information regarding the Prop 2?
I've seen people using the term FPGA. After looking up what it means, I wasn't sure, but I thought it meant a circuit that you can program connections between logic gates. Is that correct and if so, does that mean that people are testing the Propeller 2 by programming it's circuitry into an FPGA?
I heard the Prop 2 memory would be 256 KB. Does that mean that you would be able to have more colors per tile, or higher resolution graphics, or is that controlled by the hardware?
Finally, I thought I read something about the Prop 2 having floating point support in the hardware, but I don't see it on the specifications list I found (here). Where can I find the most up to date information regarding the Prop 2?
Comments
We are running a simulation, or emulation if you prefer, of the Prop 2 on FPGA hardware. This runs at 1/3 the anticipated clock speed, which is 160 - 200Mhz, and the FPGA's run at 60Mhz or so. Not sure what they will run at after the next update, but that's close enough.
256KB does mean lots of colors / tiles / sprites, etc... Prop 2 will have a pixel engine in it capable of a lot of basic operations and it can do textured polygons with some hardware assist. The video hardware controls how you use the memory, and it's flexible. It's possible to do everything from a simple, low resolution, low color depth TV display, up through and including 1080p HDTV through analog component video outputs. The 256KB of HUB memory must also be shared by the programs you want to run. Just like the P1, the P2 video system is better than the on-board HUB memory, and P2 includes some support for external SDRAM. We've got medium resolution, 24 bit color graphics screens done and running now.
Most of that is still software driven, meaning it's possible to make advanced, custom displays that make optimal use of the RAM and that offer modes / resolutions that may be non-standard, or that vary over the area of the display too. Sprites and such can either use the pixel engine, or be done using a few of the cores to fetch, merge and fill scan line buffers full of sprite data, which a primary core then draws to the screen. Single, or multiple buffer displays are easy to do.
As for math, P2 has an internal CORDIC engine. Math includes trancendentals, multiply, divide, etc... The P2 does not have an FPU in the sense you are thinking of, but it does have a lot of great math in hardware now, available to the programmer as a couple of simple assembly language instructions.
The current info is in the "Big change is done" thread, and in discussion here in general. Soon, Chip will have the latest FPGA update done, and the docs on that will provide us a clear reference as to the features and implementation details. And "soon" probably means in a couple weeks, maybe a few, depending on where things are at.
"emulation", "simulation"?
Given that the P2 does not exist yet it seems a bit off to use those words for configuring an FPGA with it's logic design. But what else could we call it?