Shop OBEX P1 Docs P2 Docs Learn Events
Trouble understanding CTRMODE modes in CTRA and CTRB — Parallax Forums

Trouble understanding CTRMODE modes in CTRA and CTRB

MJHanaganMJHanagan Posts: 189
edited 2013-12-02 11:51 in Propeller 1
I am having difficulty interpreting some PASM code from the OBEX object "jm_sircs_rx.spin". In the "mov ctra, NEG_DETECT" instruction it uses a CTRMODE value of %01100 (NEG detector) with no pin value specified. From this I assume that every internal clock tick increments the phsa register by 1. In essence this becomes an alternative CNT register which is user reset by writing a value of 0 to phsa (as is done in the code below).

The "mov ctrb, FREE_RUN" instruction uses a CTRMODE value of %11111 (LOGIC always) with no pin specified. From page 14 in the "AN001 Propeller P8X32A Counters" this seems to also act as a simple resetable CNT counter incrementing the phsb register by 1 with each clock tick.

My question is: how does CTRA differ from CTRB?

dat

                        org     0

rxsircs                 mov     ctra, NEG_DETECT                ' set ctra for pulse timing
                        mov     frqa, #1

                        mov     ctrb, FREE_RUN                  ' set ctrb for frame timing
                        mov     frqb, #1                 

waitok                  rdlong  tmp1, okpntr            wz      ' wait for zero (FALSE).
                if_nz   jmp     #waitok

waitstart               waitpeq irmask, irmask                  ' wait for high
                        mov     phsa, #0                        ' start bit timer
                        waitpne irmask, irmask                  ' wait for low
                        mov     phsb, #0                        ' start frame timer
                        waitpeq irmask, irmask                  ' wait for high
                        cmp     START_BIT, phsa         wc      ' valid start bit?
                if_nc   jmp     #waitstart                      ' try again if no

                        mov     irwork, #0
                        mov     bits, #0                        ' reset bit count

checkframe              cmp     MS_044, phsb            wc      ' check frame timer
                if_c    jmp     #irdone                         ' abort @44ms

waitbit                 test    irmask, ina             wz      ' look for new bit
                if_nz   jmp     #checkframe                     ' check for end if no bit
        
measurebit              mov     phsa, #0                        ' resstart bit timer
                        waitpeq irmask, irmask                  ' wait for high (end of bit)  
                        cmp     ONE_BIT, phsa           wc      ' ir bit --> C
                        rcr     irwork, #1                      ' C --> irwork.31
                
                        add     bits, #1                        ' inc bit count
                        cmp     bits, #20               wc      ' at max?
                if_b    jmp     #checkframe                     ' keep scanning if no
                        
irdone                  mov     tmp1, #32
                        sub     tmp1, bits
                        shr     irwork, tmp1                    ' right align ir code  

report                  wrlong  irwork, codepntr                ' write code to hub
                        wrlong  bits, bitspntr                  ' write bit count to hub
                        wrlong  DONE, okpntr                    ' alert caller
                        
                        jmp     #waitok
                        
' -------------------------------------------------------------------------------------------------

DONE                    long    true 

NEG_DETECT              long    %01100 << 26                    ' ctr neg detector
FREE_RUN                long    %11111 << 26                    ' ctr logic always mode

START_BIT               long    0-0                             ' counts in 80% of 2.4ms
ONE_BIT                 long    0-0                             ' counts in 80% of 1.2ms
MS_044                  long    0-0                             ' counts in 44ms   

irmask                  long    0-0                             ' pin mask for ir input
okpntr                  long    0-0                             ' pointer to ready flag
codepntr                long    0-0                             ' pointer to ir code
bitspntr                long    0-0                             ' pointer to bit count of code

irwork                  res     1                               ' workspace for ir input
bits                    res     1                               ' # bits in input

tmp1                    res     1
tmp2                    res     1

                        fit     492

Comments

  • kuronekokuroneko Posts: 3,623
    edited 2013-12-01 19:34
    There is no no-pin-value-specified mode for counter modes which require a pin (or two). In this case ctra would monitor pin 0 (unless the SPIN code injects a different pin number). As long as said pin is low phsa is incremented.
  • MJHanaganMJHanagan Posts: 189
    edited 2013-12-01 19:51
    kuroneko wrote: »
    There is no no-pin-value-specified mode for counter modes which require a pin (or two). In this case ctra would monitor pin 0 (unless the SPIN code injects a different pin number). As long as said pin is low phsa is incremented.

    It seems like in the case of ctra the input pin needs to be specified, but I cannot find where this is done. In my setup the IR input signal pin is 26. Since NEG_DETECT is defined as "long %01100 << 26" the lower bits 0-5 are zeros, therefore no pin specified.
  • kwinnkwinn Posts: 8,697
    edited 2013-12-01 20:02
    You are not really specifying pin numbers, you are specifying the bit location in the input register and whatever pin that bit is wired to. A bit value of 0 specifies the lsb of the register.
  • kuronekokuroneko Posts: 3,623
    edited 2013-12-01 20:08
    The lower bits being zero means pin #0 (logical, not package).

    Just had a look at the code, either the NEG_DETECT mode is intended - then the pin setup is missing otherwise pin #0 being high would block ctra - or it's supposed to be the same as ctrb. Not sure about the latter, I'd have to check the protocol first.

    Update: My vote goes to missing setup. A NEG_DETECT.byte{0} := p in the init method should take care of that (untested).
  • MJHanaganMJHanagan Posts: 189
    edited 2013-12-02 11:51
    kuroneko wrote: »
    The lower bits being zero means pin #0 (logical, not package).

    Just had a look at the code, either the NEG_DETECT mode is intended - then the pin setup is missing otherwise pin #0 being high would block ctra - or it's supposed to be the same as ctrb. Not sure about the latter, I'd have to check the protocol first.

    Update: My vote goes to missing setup. A NEG_DETECT.byte{0} := p in the init method should take care of that (untested).


    I'm using a QuickStart board and don't think I am actively using pin 0 so it might indeed be low so it works. I will try adding the pin value in the init as you suggested and try it.

    Thank you for the help.
Sign In or Register to comment.