BLDC 3-phase power board.

yarisboy

I'm building a BLDC drive and am using up some Harris G32N60E2 IGBTs. The modern version has been taken over by Intersil. I know I need a resistor between the gate drive and the gate pin on the IGBT. I read through the spec sheet for this part but didn't spot the guidance on a value for this resistor. Also I know I need a diodes between the collectors and the emitters. The IGBTs can carry a nominal 30 amps and I doubt I'll drive a PWM signal much above 8,000 hz. The diode must be able to survive the transient surges when the gate goes from conduction to non-conducting. Where could I find some design guidance on these two parts? The DC bus for this board won't exceed 400 volts and the steady-state current per phase won't exceed 5 amps. This is a hall effect sensored design utilizing a drum drive motor from a Samsung washing machine. It is an 18 slot motor.

Mark_T

Gate resistors aren't needed unless paralleling devices - you can just rely on the output resistance
of the driver chip to set the gate current. With paralleled devices there are differential oscillation
modes that are damped by gate resistors, so they are needed then. Well that's with MOSFETs,
IGBTs may be less sensitive to such things as the gate and channel are more isolated from the drain.

That said a gate resistor can be used to limit the slew rate - though this will increase losses it will
tame the higher frequencies of EMI output from the bridge. A resistor can also be part of the protection
circuitry - add a zener or TVS across gate/emitter and the resistor will limit the current to the
zener (remember significant emitter bounce can happen, adding to Vge).

For the diode fast recovery is important, and if you use synchronous rectification then it only
carries pulses of 30A so the pulse rating is appropriate. Otherwise you'll have to go for continuous
rating.

Things get hairier the higher the voltage (IGBTs are more robust than MOSFETs though) so taking
a lot of care to consider failure modes and adding protection circuitry is, I understand it, important.

I've built H-bridges running upto 38V with MOSFETs myself, I would strongly recommend an iterative
process, increasing the voltage and current a step at a time and testing each time looking for problems,
once things go wrong at these power levels the result is silicon vapour.... I'd either wear eye-protection
or have the devices behind a screen, they can and do explode under fault conditions.

The weak points are gate-emitter voltage limits, with these devices its +/-20V, yet the recommended
gate drive is 15V, so -5V of emitter bounce could kill the devices. Low inductance on the emitter
path is vital and 4-wire connection (separate gate/emitter twisted pair feed to the driver with emitter
leads commoned as close as possible the device?)

Other weak point is the raw power from the supply and its decoupling should shoot-through occur -
this is what vaporizes devices, here you have 400V and 30A, thats 12kW (the power of a small car
engine!). Choose drivers with built in shoot-through protection and generous or adjustavble dead-time,
be prepared to tune deadtime (you need more for higher currents as they take longer to switch off).

Good luck there!

yarisboy

I've set it up with a regulated, isolated DC source for each gate with gate-emmiter voltage regulated down to 17 volts. The Avago gate drivers want 15-30 volts and the IGBTs are rated for 20 volts max continous, hence the sweet spot. Each gate has a power supply capable of about 2 watts. If the gates were solid-on, their duty cycle would amount to 30%. Once I go past the controlled DC stage of testing and start using PWM their power consumption will go up a bit charging and discharging the gate during their on-period. As far as shoot through goes their is a distinct advantage of the hall effect triggered commutation. I can be sure any gates on are turned off before turning on gates required in the next control vector. With the help of ViewPort I will actually be able to measure gate response times by using an accessory 8-channel A/D chip as I walk up the speed of the whole system. If I start with generous dead bands I should be able to measure how much those bands can be safely trimmed. I tried to buy 12-blocks today but One_Robot didn't like my credit cards. I let Hanno know there is a glitch there.

yarisboy

The Avago drivers show a discharge device with free-wheeling diode inside them below the on-device. The IGBTs claim they don't need negative bias to turn fully off. I'm starting with a 5 ohm gate pin resistor. I can study the effects of changing that once we get this show on the road. Stay tuned.

yarisboy

Actually as I review Microchip's AN899 I realize that punch through is much less of a risk with this design. only four of the six gates are conducting at one time. As I looked down through the control vector chart I realized that in each phase upper and lower gates on periods are automatically separated by 60 electrical degrees because only 2 of the three motor windings are being used at any one time. With a VFD vector drive this would not be true.

Mark_T

Usually true, but not in fast decay mode PWM (antiphase), then the switching is directly between low and high arms
on the same 1/2 bridge (while another 1/2 bridge switches high to low) - this is then exactly like a standard H-bridge.