5MHz Input to Cog?

ckbw33

I would like to interpret a 5 MHz carried data stream. Logic signal (square wave), 4 clock cycles per bit @ 5 Mhz, phase inversions denoting bit value (1/0). BPSK. Data is comes in 98 bit bursts, no clock signal available (except the inherent clock characteristic of the carrier). My question is, is this feasible with a COG, or is a traditional logic circuit required at this frequency?. My thinking is to sample (shiftin in PASM), buffer, and possibly use a second COG to find the phase inversions. My thinking is this is on the hairy edge. Most PASM commands require 4 clock cycles, so 80 Mhz quickly becomes 5 MHz sample rate with two lines of code? I hope the experts here can guide (save) me before attempting something impossible. Thanks!

Mike Green

Yes, all you get is 2 lines of code. That's enough to sample once every 100ns:

               test     bitMaskN,INA   wc
               muxc      firstOf98,bitmaskM

Note that "bitMaskN" is the I/O pin's bitmask while bitMaskM is for the bit where the sample is to be stored in the table of 2x98 bit samples.

You'd need a table of 32 bit masks plus the above two instructions for each bit sample and two samples per bit-time (200ns) for a table of 2x98 bit samples ... about 7 32-bit words. I can see the Propeller and the incoming signal getting out of phase such that the samples are too near the bit transitions of the data so they're missed, but a little analog processing ahead of time can help this.

This takes about 200 long words for the instructions, 32 longs for the bit masks, and 7 for the data itself. That's only about half of the available cog space which can be used to copy the data to hub memory after each burst and to synchronize with the start of the next burst.

ckbw33

Thanks Mike - That's good advice. So at least I didn't get the response "If you check pg 1 of the datasheet" . I agree the jitter may be a problem. Do you think I can simply bridge two pins on a protoboard as a starting point, or is it impossible to bit-bang or counter generate 5 MHz clock?

Mike Green

The cog counters can certainly generate a 5MHz clock. That's 100ns on and 100ns off. You can also bit-bang it:

               or        outa,bitMaskN
               nop
               andn      outa,bitMaskN
               nop

You'd repeat this for the length of a burst, then loop back for another burst. You could even run this in one cog and run the receiver in another cog looking at the same I/O pin. Don't forget to set the proper DIRA bit during initialization of this cog. You can substitute a DJNZ for the last NOP to get a counted loop and load the DJNZ's counter long with the pulse count you want. A DJNZ takes 4 clock cycles if it jumps, so the timing stays right on for the whole burst.

Phil Pilgrim (PhiPi)

ckbw33,

BPSK refers to a modulation method wherein a sine wave is phase shifted in the analog domain. What you're referring to sounds more like Manchester coding in the digital domain. Can you elaborate further, please?

-Phil

ckbw33

Phil - You are 100% right, and you have just improved my googling space by 1000%! My previous searches yielded what you have described. I'm following along in another forum (RC hobbies) where a gentleman has designed an elegant logic circuit to do the Manchester decoding/demodulation. It seems the Prop could simplify eliminate the front end electronics and minimize some complexity. The source stream comes from RF, so having some extra DSP may also be beneficial to reject noise. Thanks to both you and Mike, I know just enough to be dangerous on this stuff.