How does C code load/run in memory?

Fernand

I'm still unclear on how the Prop uses memory. Can someone point me to some explanation(s)? E.g. is C code completely compiled to PASM? If there's no Spin interpreter, where is this compiled code executed? If without using external RAM we can have programs that total up to 32kb, clearly bigger than Cog memory, how does one control which cog is being used for a given "thread"? Can a Cog execute directly out of Main Memory, and is there a latency price compared to Spin ? How does one mix in Spin code? Thank you!

jazzed

There are variations ....

• COGC model in Propeller-GCC is PASM code that uses HUB memory for stack and data. PASM code is executed entirely in one or more COGs.
• CMM (Compact Memory Model implemented in GCC by Eric R Smith) is mostly an interpreted byte-code.
• LMM (Large Memory Model suggested by Bill Henning) code is mostly PASM code fetched from HUB RAM and executed in the COG.
• XMM variations are essentially LMM programs where code and data are in external memory and/or HUB ram depending on model.

All C programs except for the COGC model may be considered interpreted because a "kernel" or virtual machine is required for them to run. Performance of C programs is also tied to the HUB RAM window access timing for the one at a time LMM overlay or the fcache burst overlay.

Any function that is small enough can run entirely in the COG fcache area. Fcache is an overlay where PASM code is fetched from HUB RAM and run in the COG without interpretation, but it needs a kernel to manage code residency. Code is swapped when necessary.

There are other topics, but that sums most of it up.

jazzed

More information on memory models can be found here: https://code.google.com/p/propgcc/wiki/PropGccMemory
The wiki has several other pages also: https://code.google.com/p/propgcc/wiki

Another Propeller-GCC that is mentioned in the SimpleIDE Help Menu is here: https://sites.google.com/site/propellergcc/

Fernand

Thanks!

So even Assembly code is never just running loose, it's usually being fetched from Hub or external RAM in appropriate chunks and executed in the cog under control of a kernel?

These issues seem essential. Where is there a clear description that defines the terms? [edit] I'll look over the reference you provided, but it always seems these explanations assume the reader is familiar with the chip's specific jargon. Fcache is barely mentioned. How big is it? Does each cog have one?

jazzed

C programs written for and compiled with COG mode (-mcog) generates assembly code that is run in a COG.

Other modes can use asm(...) inline code that will be fetched from HUB RAM.

Fcache is an area that is at least 64 longs in the kernel COG. This means a second COG is not required in C to do useful things. There are some serial in/out driver functions for example that will run in any mode and fit entirely inside that area. Even the slowest mode can do bit-banged serial IO at 115200bps. By comparison, the fastest SPIN function can do 19200bps.