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DEMO: Single Pin Sigma Delta ADC Driver v1 — Parallax Forums

DEMO: Single Pin Sigma Delta ADC Driver v1

Beau SchwabeBeau Schwabe Posts: 6,566
edited 2013-12-10 17:03 in Propeller 1
Name basically says it all.

This is a single pin Sigma Delta ADC. The Drive pin and Feedback pin functions have been combined into a single pin.

The code is very simple, you set the pin that you want to use, the number of Samples (or resolution), and the address of the variable that you want to update.
   'Start(ADCpin,ADCsamples,VariableAddress)
    Start(0,8191,@ADC_Sample)


enjoy!

http://obex.parallax.com/object/697

Comments

  • average joeaverage joe Posts: 795
    edited 2013-07-16 20:52
    Drive and feedback in one pin, that's awesome. This is awesome, gotta try it out later tonight!
    Thanks Beau
  • Cluso99Cluso99 Posts: 18,069
    edited 2013-07-16 23:30
    Agreed, its awesome!
  • william chanwilliam chan Posts: 1,326
    edited 2013-07-16 23:33
    Is it as accurate and as stable as the 2 pin ADC?
  • FernandFernand Posts: 83
    edited 2013-07-17 01:01
    Way cool! On the right side of your diagram, with Vdd and Vss shown, how is the 10k resistor connected?
    With only one pin connected, is the circuit more tolerant of the length of the runs/traces? With A and B
    timers, do you get two usable A/D channels per cog? Thanks!
  • John BoardJohn Board Posts: 371
    edited 2013-07-17 01:02
    All you have to do is increase the channels :P
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2013-07-17 02:10
    Most of the Prop 1s that I have are 40DIPs, it will be interesting to see how this works. I have never had that much success with ADC on the 40DIPS and just assumed that it was the internal lengths etc
  • PaulPaul Posts: 263
    edited 2013-07-17 07:03
    Just tried this on Bean's mini development board (the one with the breadboard) and it worked! I was really surprised. I mean this isn't the greatest environment for these things. Range was from about 0.2V on the pot to about 2.3V.= 8191 That may be due to the 'extra' capacitance. IDK. It seems pretty linear up to that point.

    Good Job Beau!
  • ChrisGaddChrisGadd Posts: 310
    edited 2013-07-17 13:04
    Very nifty circuit; I wouldn't have thought that would work. Turns out to be quite stable and linear.
    I wrote a quick program using this circuit in a four-channel ADC and noticed a problem with interference between channels, where the readings can change by +/-200 depending on the inputs to other channels.
    Increasing the resistor values to 10K and 15K reduces the effect somewhat, but nothing I did could eliminate it. Here's what I found using variable power supplies on channels 1 - 3 and a battery with voltage divider on 4:
            Using 10K and 15K resistors:                 
                      input voltage                           readings
             ch1   |  ch2    |  ch3   |  ch4   ||  ch1   |  ch2   |  ch3   |  ch4
           --------+---------+--------+--------++--------+--------+--------+------- 
            0      |  0      |  1.5   |  open  ||     0  |     0  |  4605  |  4096  
            0.231  |  0.350  |  1.5   |  open  ||     1  |     1  |  4605  |  4096  
            2.313  |  0.350  |  1.5   |  open  ||  8190  |    35  |  4640  |  4096   <- increase on ch3 when 1 or 2 at max reading
            0.221  |  2.303  |  1.5   |  open  ||     1  |  8190  |  4640  |  4096
            2.294  |  2.290  |  1.5   |  open  ||  8190  |  8190  |  4506  |  4096   <- but decreases when both are high?
            3.3    |  2.290  |  1.5   |  open  ||  8191  |  8190  |  4684  |  4116   <- increases again when 1 or 2 brought to Vdd
            3.3    |  3.3    |  1.5   |  open  ||  8191  |  8191  |  4692  |  4139
            1.5    |  1.5    |  1.5   |  open  ||  4757  |  4657  |  4640  |  4096
            1.5    |  1.5    |  1.5   |  0.4   ||  4733  |  4625  |  4630  |     1   <- all readings decrease when ch4 connected at minimum
            1.5    |  1.5    |  1.5   |  2.27  ||  4780  |  4680  |  4666  |  8191   <- all readings increase when ch4 brought to max reading
    

    ADC 1-pin sigma_delta 4x parent - Archive.zip
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-17 13:33
    ChrisGadd,

    WOW, thanks for doing that... I wonder if it's just parasitic capacitor cross talk. What if you went every other pin, and/or instead of changing the resistors, you changed the capacitor instead. In practice, I found that using different capacitor values was very forgiving (I tested up to 10uF), and would in fact affect the effects of external noise. For this type of ADC, the capacitor doesn't play as much of a role in RCTIME as it does just maintaining the voltage level at the I/O threshold. Using a 0.047uF might be too small when it comes to "sharing" some capacitance with an adjacent neighbor.
  • FernandFernand Posts: 83
    edited 2013-07-17 14:10
    In the schematic Beau provides, can someone please clarify where
    that 10k resistor on the right is actually connected?

    AD_onSinglePropPin.gif
    707 x 445 - 30K
  • ChrisGaddChrisGadd Posts: 310
    edited 2013-07-17 14:15
    No such luck, I was actually using pins 0, 8, 16, and 24, and the ADC circuits were widely separated as well on a breadboard. I did try caps up to 47uF and didn't notice much change in the readings, though that was when I was trying to get a greater range on the readings. I'll have to try it again with an eye on the interference.
    Re: DEMO: Single Pin Sigma Delta ADC Driver v1

    In the schematic Beau provides, can someone please clarify where
    that 10k resistor on the right is actually connected?
    That 10K resistor is depicting a potentiometer, with the wiper connected to the analog input of the ADC circuit.
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-17 14:41
    ChrisGadd,

    Looking at your code is the source of the problem. You can have multiple ADC inputs, but each input needs to be in it's own loop and polled one at a time. The ratio of the resistors used actually is a reflection of this loop. When you combine multiple channels into the same loop, the timing get's thrown off and messes the channel value up. .... I'll look at your code later tonight and see If I can re-work it so that the individual loops are preserved and there might be a way to interlace the channels, but I need to get my head around it and working in a non-interlaced form first.

    Note: The ideal resistor ratio should be 1:2.5 ... however the 1k and 2.2k are close enough and provide a little padding on either end when using a potentiometer to ensure the full range. The ratio is derived by the number of instructions required in the loop, and how much of the instruction is configured as an input versus how much of the instruction is configured as an output. In this case 2 instructions are outputs, and 5 instructions are inputs. So literally 2:5 or ... 1:2.5
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-17 20:37
    ChrisGadd,

    To be fair, I wonder if there is a similar discrepancy from pin to pin with the 2-pin Sigma Delta. I looked over your code, and there is a reason why, based on the code ratio mentioned earlier, and the resistors used, why there is a certain place in your code to make the ADC pin an output that I see that you have made note of in your program. However, be careful that the resistors that you use are not too large in relation to the resistance of the pot. What seems like a linear response actually 'bulge" in the middle, but on either extreme it should converge. When the resistors are larger in relation to the potentiometer, the 'bulging' becomes more exaggerated. I suppose alternatively you could place two 2.2k resistors on each outer leg of the potentiometer... assuming that the 1k is still the lower ratio resistor. That would make the response truly linear, but may not be conducive to many applications.

    The reason I wonder if there is a similar pin to pin discrepancy, is that I see similar differences using the exact same circuit in singular mode moving manually from pin to pin. So regardless of adjacent pins, there is enough I/O threshold difference from pin to pin that shows up and can be detected with this ADC.
  • jmgjmg Posts: 15,173
    edited 2013-07-17 23:53
    ChrisGadd wrote: »
    I wrote a quick program using this circuit in a four-channel ADC and noticed a problem with interference between channels, where the readings can change by +/-200 depending on the inputs to other channels.

    Crosstalk did look to be the weakness of this circuit, when I glanced at it. Good to see someone measured that.

    It is not just parasitic C, but common mode (shared) impedance in the die metal, and direct drive into a Cap, is going to create some serious current spikes.
    200 in 4096 is around 5% of cross talk, which is significant.

    I would expect this effect could be lowered, by choosing pins either side of Vcc/Gnd, (and QFN over DIP) and maybe also a small series resistor added to the Cap.
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-17 23:58
    jmg,

    "...and direct drive into a Cap" ... It's not direct drive, there is a series 1k resistor to the cap from the I/O pin.

    The variance also occurs if you use a singular version rather than the Quad, and manually move it from one pin to the next using the same circuit, just changing the pin. This is a result of the I/O threshold being slightly different from pin to pin. I am willing to bet that the "Drive/Feedback" ADC that we are all familiar with that uses 2 pins will show similar behavior.
  • ChrisGaddChrisGadd Posts: 310
    edited 2013-07-18 05:12
    The program was just me trying to be clever in finding a way to measure four ADCs at the same time, though it looks fine when reading one at a time, and this was never going to be used for high-speed anyhow.
    If I'm understanding the problem right, it's to do with the total power dissipation of the Prop and every picowatt making a difference?

    And there absolutely are differences between prop pins, just moving the ADC between pins causes large changes in the readings.

    Chris


    Actually the loop time for four ADCs in series is only about 11.5ms compared to about 6 ms for the parallel routine.
    Just out of curiosity, why'd you go with 13-bit sampling?
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-18 08:18
    "Just out of curiosity, why'd you go with 13-bit sampling?" - Just an arbitrary value, you can use any number you want. If you wanted your range to vary between 0 and 100, you could do that to if you wanted. 8191 just seemed like a good number to start with at the time.
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-18 11:03
    Here is a practical application using the Single pin Sigma Delta... The voltage differential that the ADC is having to detect is only about 100mV Pk-Pk

    http://forums.parallax.com/showthread.php/149216-DEMO-IR-Heartbeat-detector
  • jmgjmg Posts: 15,173
    edited 2013-07-18 13:06
    ChrisGadd wrote: »
    If I'm understanding the problem right, it's to do with the total power dissipation of the Prop and every picowatt making a difference?

    And there absolutely are differences between prop pins, just moving the ADC between pins causes large changes in the readings.

    You might want to expand on that ? Above, you mentioned one ADC reading changed, merely as another channels voltage varied ?
    ( ie classic cross talk, which is caused by unwanted couplings between channels).

    That can include charge injection, or shared impedance, or timing jitter.
    What package are you testing ?
  • FernandFernand Posts: 83
    edited 2013-07-19 03:03
    ChrisGadd wrote: »
    That 10K resistor is depicting a potentiometer, with the wiper connected to the analog input of the ADC circuit.

    Thanks, Chris.
  • ChrisGaddChrisGadd Posts: 310
    edited 2013-07-19 09:50
    jmg wrote: »
    You might want to expand on that ? Above, you mentioned one ADC reading changed, merely as another channels voltage varied ?
    ( ie classic cross talk, which is caused by unwanted couplings between channels).

    That can include charge injection, or shared impedance, or timing jitter.
    What package are you testing ?
    I'm using a 40-pin dip and I think we've established that crosstalk is a problem when trying to read four ADCs simultaneously. That comment was in reply to Beau's comment that "This is a result of the I/O threshold being slightly different from pin to pin." where I noticed that the same ADC circuit with the same input gave different readings depending on the IO pin it was connected to, even when running Beau's single ADC routine.

    I was curious to see what the threshold on each channel actually was. At the risk of getting slightly off topic, I connected the output of an adjustable power supply through a current limiter to each pin--one at a time--adjusted the voltage until the pin was toggling steadily, and noted the voltage on a Fluke87 connected at the pin.
    With Vdd measured at 3.297V, and nothing connected to any pin except the tx on P30
             
    P0:  1.411    P8:  1.440    P16: 1.445    P24: 1.440                             
    P1:  1.442    P9:  1.428    P17: 1.421    P25: 1.418
    P2:  1.418    P10: 1.409    P18: 1.423    P26: 1.429
    P3:  1.428    P11: 1.426    P19: 1.420    P27: 1.432
    P4:  1.417    P12: 1.427    P20: 1.423    P28: 1.423
    P5:  1.428    P13: 1.424    P21: 1.450    P29: 1.432
    P6:  1.392    P14: 1.409    P22: 1.410    P30:       
    P7:  1.408    P15: 1.425    P23: 1.413    P31: 1.434
    
    There's about a +/- 40mV range between a solid 0 and a solid 1, which is about the amount of noise I see on the power supply.
    
    And here's the code I used while adjusting the power supply until the serial terminal showed roughly 500:
    CON
      _clkmode = xtal1 + pll16x                                                   
      _xinfreq = 5_000_000
    
    OBJ
      FDS : "FullDuplexSerial"
      
    PUB Main | n
      FDS.start(31,30,0,115_200)
      repeat
        waitcnt(cnt + clkfreq / 10)
        FDS.tx($00)
        n := 0
        repeat 1000  
          if ina & $BFFF_FFFF
            n++
        FDS.dec(n)
    
    Chris
  • tonyp12tonyp12 Posts: 1,951
    edited 2013-07-19 10:00
    >and nothing connected to any pin
    Are these unused pins turned as output?, 29 pins left floating can not be good.

    Or supply ALL the pins with the same adjustable voltage and sample all the pins.
    And show value as binary to visually show when some pins still register lows while others are high.
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-07-19 13:58
    tonyp12,

    "and nothing connected to any pin Are these unused pins turned as output?, 29 pins left floating can not be good." - This is ok with a Sigma Delta. A pin left "floating" will seek the threshold voltage of the I/O. In this respect, it is no different than the feedback pin on a conventional Sigma Delta ADC requiring both a Drive and Feedback pin.

    "Or supply ALL the pins with the same adjustable voltage and sample all the pins. And show value as binary to visually show when some pins still register lows while others are high." - That would work, but not with the current program due to the nature of the Sigma Delta conversion. As soon as the first pin detects the threshold, the he wins priority over all of the other pins rendering their readings invalid. You could do that experiment by simply looking at the entire INA register and displaying that on a terminal as a 32 bit binary as you slowly raise or lower the voltage attached to ALL of the pins your testing.
  • tonyp12tonyp12 Posts: 1,951
    edited 2013-07-19 14:27
    I was referring to finding the threshold test (without any ADC connected)

    Plus if you are doing a ADC test on one pin, probably would be best to turn the other pins to output
    as having all these pins floating can create noise on the power rail.

    If the power rail is not clean how are going to judge an external voltage?
  • jmgjmg Posts: 15,173
    edited 2013-07-19 17:25
    ChrisGadd wrote: »
    ... I connected the output of an adjustable power supply through a current limiter to each pin--one at a time--adjusted the voltage until the pin was toggling steadily, and noted the voltage on a Fluke87 connected at the pin.[code]
    With Vdd measured at 3.297V, and nothing connected to any pin except the tx on P30

    P0: 1.411 P8: 1.440 P16: 1.445 P24: 1.440
    P1: 1.442 P9: 1.428 P17: 1.421 P25: 1.418
    P2: 1.418 P10: 1.409 P18: 1.423 P26: 1.429
    P3: 1.428 P11: 1.426 P19: 1.420 P27: 1.432
    P4: 1.417 P12: 1.427 P20: 1.423 P28: 1.423
    P5: 1.428 P13: 1.424 P21: 1.450 P29: 1.432
    P6: 1.392 P14: 1.409 P22: 1.410 P30:
    P7: 1.408 P15: 1.425 P23: 1.413 P31: 1.434

    There's about a +/- 40mV range between a solid 0 and a solid 1, which is about the amount of noise I see on the power supply.

    It could be Interesting to check how that 500 target, varies as other pins (adjacent, and more isolated) vary thru their thresholds.

    The mask would need to target a single pin only.
  • ChrisGaddChrisGadd Posts: 310
    edited 2013-07-19 18:07
    tonyp12 wrote: »
    I was referring to finding the threshold test (without any ADC connected)

    Plus if you are doing a ADC test on one pin, probably would be best to turn the other pins to output
    as having all these pins floating can create noise on the power rail.

    If the power rail is not clean how are going to judge an external voltage?
    Good idea, you should try that! If you want to go the binary route and monitor every pin simultaneously, the loop I used was fds.bin(ina,32). I tried that and gave it up as it was too difficult to find the median voltage where the pins would toggle, and instead wrote the scoring routine to make it easier. For myself, I consider my curiosity satisfied.
  • caskazcaskaz Posts: 957
    edited 2013-12-10 00:51
    Hi Beau Schwabe.

    I tried [Single Pin Sigma Delta ADC Driver].
    This can convert analog from 120mv to 2.3V.
    Not less than 120mv and more than 2.3V.

    Why [Single Pin Sigma Delta ADC Driver] cannot convert analog from 0V to 3.3V?
  • Beau SchwabeBeau Schwabe Posts: 6,566
    edited 2013-12-10 10:35
    I think this might be due to the non-linear response on the extreme's. The ADC has a difficult time when the wiper of the pot is at one extreme or the other.
  • jmgjmg Posts: 15,173
    edited 2013-12-10 17:03
    caskaz wrote: »
    Hi Beau Schwabe.

    I tried [Single Pin Sigma Delta ADC Driver].
    This can convert analog from 120mv to 2.3V.
    Not less than 120mv and more than 2.3V.

    Why [Single Pin Sigma Delta ADC Driver] cannot convert analog from 0V to 3.3V?

    I think because the Pin changes direction, the Time-Domain slicing comes into the picture too.

    Unlike a conventional SDM D-FF where the FF.Q drives the feedback 100% of the time, this design time-shares between the charge balancing(output), with checking the pin level(input).
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