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EEPROM Destructive Testing — Parallax Forums

EEPROM Destructive Testing

ercoerco Posts: 20,256
edited 2013-07-03 09:09 in General Discussion
Some boys over in the PicAxe forum are betting on how many WRITE cycles an EEPROM can take before failing. Usually estimated at over a million, but one guy got his up to 14 million and quit. Now the debate is whether the guy's program has a bug, or whether running at 3.3V should last longer than 5V: http://www.picaxeforum.co.uk/showthread.php?24119-How-many-writes-can-a-24LC256-take-let-s-find-out-!/page4

Has anyone done any such testing on a Stamp or Prop? We can't let those Brits have all the fun, especially this close to July 4. Let the fireworks and magic smoke begin!

Comments

  • localrogerlocalroger Posts: 3,451
    edited 2013-06-29 15:06
    Back in the 1990's, when the state of the art rated EEPROM at 100,000 write cycles, we inherited a system built by a competitor which weighed trucks at an interstate truck weigh station. And every six or seven months the truck counter would stop working. Our competitor solved this by replacing the controller main board which cost $800. When it happened on our watch I inspected the board and noted that there was no battery. There was however a small EEPROM. It was socketed and I happened to have another chip; when I replaced it, the truck counter started working again. That station weighs about 1,200 trucks a day.

    I have not tried destroying a modern EEPROM but I've had no problems using them with modestly aggressive cycling.
  • ercoerco Posts: 20,256
    edited 2013-06-29 15:13
    Update: This guy got to 4.9 million waaaaaaaaaaaaaaaaay back in 2007: http://www.picaxeforum.co.uk/showthread.php?7272-pic-eeprom-memmory-endurance-testing-technical&p=46665&viewfull=1#post46665
  • Mike GreenMike Green Posts: 23,101
    edited 2013-06-29 15:18
    Most EEPROMs these days are rated for over 10^6 writes over the full temperature range. If I remember correctly, this is somewhat temperature sensitive and gets worse as the temperature rises. I don't think it's dependent on the operating voltage, as long as that's kept within the spec'd limits since the voltage is run through a charge pump for the actual programming and presumably regulated, at least somewhat.

    The problem is that charges get trapped in the oxide layer so they can't be removed with a programming cycle. You could probably unroof the chip and expose it to UV light like in the "good old days" when there was no electrical erase cycle. You could probably take the device to your "friendly neighborhood" nuclear medicine facility and have them irradiate it at a high enough level to drain off those charges without damaging the lattice.

    A test program really needs to erase cells to 1s, then try to program them to 0s in different patterns and see whether any of the bits won't change to 0. That's the failure pattern. The chip does the two phases automatically, so I don't know whether it's enough to just try to program bytes to 0 repeatedly or whether you'd want to write all 1s, then all 0s and see what happens. I'm sure others could suggest better tests.
  • ercoerco Posts: 20,256
    edited 2013-06-29 15:40
    @Mike: As ever, I bow to your vast technical knowledge. Your huge areas of expertise and well-written replies make you an invaluable resource and icon in this forum!
  • Too_Many_ToolsToo_Many_Tools Posts: 765
    edited 2013-06-29 16:16
    I agree...without knowing the specifics the results are not comparable.

    I suggest looking up testing procedures and duplicating them as a standard test for all contestants.

    Mike Green wrote: »
    Most EEPROMs these days are rated for over 10^6 writes over the full temperature range. If I remember correctly, this is somewhat temperature sensitive and gets worse as the temperature rises. I don't think it's dependent on the operating voltage, as long as that's kept within the spec'd limits since the voltage is run through a charge pump for the actual programming and presumably regulated, at least somewhat.

    The problem is that charges get trapped in the oxide layer so they can't be removed with a programming cycle. You could probably unroof the chip and expose it to UV light like in the "good old days" when there was no electrical erase cycle. You could probably take the device to your "friendly neighborhood" nuclear medicine facility and have them irradiate it at a high enough level to drain off those charges without damaging the lattice.

    A test program really needs to erase cells to 1s, then try to program them to 0s in different patterns and see whether any of the bits won't change to 0. That's the failure pattern. The chip does the two phases automatically, so I don't know whether it's enough to just try to program bytes to 0 repeatedly or whether you'd want to write all 1s, then all 0s and see what happens. I'm sure others could suggest better tests.
  • xanaduxanadu Posts: 3,347
    edited 2013-06-29 16:24
    So we're not going to melt anything here then? I was going to make a P1 with a spark gap ignitor shock itself but the spark gap ignitor went bad before I had a chance :(
  • prof_brainoprof_braino Posts: 4,313
    edited 2013-06-30 11:03
    erco wrote: »
    Has anyone done any such testing on a Stamp or Prop?

    Sal is doing test till failure on an SD with his simple logger. This could be run on the EEprom using the EEprom filesystem. I'm not able to do this test at the moment, but all the pieces are in place, anybody wants to, Sal will answer questions.
  • FranklinFranklin Posts: 4,747
    edited 2013-06-30 11:14
    And for flash...http://dangerousprototypes.com/2010/05/25/prototype-flash_destroyer/
  • Heater.Heater. Posts: 21,230
    edited 2013-06-30 12:09
    Sal has a very short test ahead. SD cards seem to fail as soon as I look at them the wrong way.
  • prof_brainoprof_braino Posts: 4,313
    edited 2013-07-01 17:02
    Heater. wrote: »
    Sal has a very short test ahead. SD cards seem to fail as soon as I look at them the wrong way.

    Quite the opposite so far: he is logging to the same file once per second. While each record data is written to a new location, the file header is rewritten each record. Hes past 160 MEG after two weeks with no errors, and the test will be left to run until the card fails or the card runs out of room. Its run another two weeks since then and still going strong.

    By simply creating a new file when the day rolls over, it looks like a caard could last a good long time for logging.
  • ercoerco Posts: 20,256
    edited 2013-07-03 09:09
    An interesting note that Microchip's new EEPROM architecture writes a whole 64-byte page even if you only want to write to a single byte. There's more wear & tear than may be intended!

    http://www.picaxeforum.co.uk/showthread.php?24119-How-many-writes-can-a-24LC256-take-let-s-find-out-!&p=241337&viewfull=1#post241337
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