Sharing IO Pins on the BS2px
xanatos
Posts: 1,120
Hi,
I have the following setup:
I'm sharing the data and clock lines for my DS1302 and my 74HC595s... but can I share the clock line of the MCP3202 and one (obviously) of the data lines with the others as well? Perhaps the ADCDin line, for example? DOes the MCP have the ability to ignore data passing by when the CS isn't active? From what I've read on teh data sheet I am thinking it should - but I just want to double check with you more experienced folks.
Thanks,
Dave
I have the following setup:
' -----[ I/O Definitions ]------------------------------------------------- SClock PIN 0 ' shift clock (74HC595.11 and DS1302.7) SDataIO PIN 1 ' serial data (74HC595.14 and DS1302.6 via 1k resistor) L595 PIN 2 ' output latch (74HC595.12) CS PIN 3 ' MCP3202.1 CS MCP3204 CH0 = pin 2, CH1 = pin 3, Vss = pin 4, Vdd = pin 8 CLK PIN 4 ' MCP3202.7 CK AData PIN 5 ' MCP3202.6 DO ADCDin PIN 6 ' MCP3202.5 DI
I'm sharing the data and clock lines for my DS1302 and my 74HC595s... but can I share the clock line of the MCP3202 and one (obviously) of the data lines with the others as well? Perhaps the ADCDin line, for example? DOes the MCP have the ability to ignore data passing by when the CS isn't active? From what I've read on teh data sheet I am thinking it should - but I just want to double check with you more experienced folks.
Thanks,
Dave
Comments
Make sure that the DS1302's CE line has a pulldown and the MCP3202's CS line has a pullup so both chips are disabled until the BS2px enables them. Similarly, you might want pulldown on the 74HC595's shift clock and latch clock lines.
The reason I ask is because the system is working (or at least seems to be!) with the lines being shared with the 1302 and the '595s. Just that the last thing that goes on the lines before the '595s get their latch signal is the count that gets loaded to them immediately prior to the latch. These 595s are part of the circuitry that scans my 100+ inputs - and the sequencing is working perfectly with those lines shared. The 1302 is polled immediately prior to each scan sequence and it's reporting properly as well
So long as the latching and data loading sequences between the '595s and the other items on the buss are well controlled - is there any other issue I'm potentially missing by sharing D & C with the '595s?
Thanks - as usual - very much for your help.
Dave
And to find that I can share the DI & DO as long as I use that 1k between them is an added benefit. I've got a LOT of stuff hanging off of my Stamp in this project, and now adding a pair of MAX7219s to drive a visual annunciator panel with 128 LEDs, I'm just wanting to conserve as many pins as possible (although I know I can share the D & C lines of the MAX7219 with the others as well - just adding it's own dedicated CS or Latch).
Thanks again for your guidance,
Dave
http://www.savagecircuits.com/binarydigitalclock
Thanks again for your efforts and willingness to share & teach.
Dave
You're welcome. I wasn't sure if the code would be any use to you, but I figured the schematic would help you out. That schematic was also meant to show one other thing. There are always considerations when mixing SPI parts like that. As you can see on the DS1302 and the DS1620, the data lines have a series resistor to protect against contention in the event the BASIC Stamp is driving the lines at the same time as the DS1302 or DS1620. By using the same constants for the pins the code was also cleaner since there is a one-to-one correspondence bewteen the pin definition and the actual I/O pin. More devices could have shared these lines, however there was no need in this project.
Thanks again guys!
Dave
Dave, Just what are you going to do with all those 128 inputs?!?
If you look at my sketch, you'll see I've place a 1k resistor in front of each of the three devices sharing the same DATA pin. Before I added the resistors, the clock was working fine, but I could not get the shift registers to feed in the switch values. Now that I have added the three resistors, nothing seems to work except the MAX Display. I know I have not posted my code (which would probably help), but for now I just need a sanity check that the resistors are indeed necessary. If I can work without them, or I only need one in front of the DS1302, then I'll make any hardware changes required. I just don't want to alter my code to death if I have a hardware issue. Thanks for your help.
If I understand you correctly, I can eliminate the two 1k resistors at both shift register data lines and just have the one 1k on the shared data line between the BS2 and the DS1302?
http://www.savagecircuits.com/binary-digital-clock/
It looks like you only have the one 1k on the shared data line (DS1620, DS1320 & 74HC595's) just before the DS1302 and you have a dedicated data line for the MAX7219 (Just like I'm doing). I used part of the clock code from your site already and that seems to work good. My circuit is an Odometer, Trip odometer and Clock all on a triple stack mezzanine set-up (3"x4") that fits into a standard 1988 Pontiac GTA dash bezel. I'm using the battery backed RAM on the DS1302 to store the Miles & Trip values every mile and then save just the miles value to the EEPROM every 100 miles so it does not wear it out. The odometer pulses (2000/mile) are feed into an 8 bit counter (74590) that I use as an accumulator while the stamp is running through it's main loop. When it's time to read the accumulator (0-255), I just shift in the 8-Bit values and reset the counter. The math is pretty simple and the 2SX has more than enough speed to keep up with the accumulator at normal highway speeds.
I'll tweak a few things based on your suggestions and post a picture of the completed unit. Thanks for your help guys.
By the way, I did receive your email and will reply later today. I've been a little busy lately.