Jitter between two counters

ADZ_916 · 2013-02-14 21:29

Hey guys, using this code, pretty much copied from AN001 :

PUB NCO_single_ended_mode | i
'            mode PLL       BPIN     APIN
  repeat
    ctra := %00100_000 << 23 + 8 << 9 + 20 'Establish mode and APIN (BPIN is ignored)
    frqa := $80_0000 'Set FRQA so PHSA[31] toggles every clock

    ctrb := %00100_000 << 23 + 8 << 9 + 19 'Establish mode and APIN (BPIN is ignored)
    frqb := $80_0000 'Set FRQA so PHSA[31] toggles every clock

    dira[19] := 1 'Set APIN to output
    dira[20] := 1

I get jitter between the two counters:

http://youtu.be/p_kTFzpMRdk

Is there a way to use one counter as a reference signal so I can use my scope to experiment with pulse width and phase on the counters? Any advice is greatly appreciated.

-ADZ

kuroneko · 2013-02-14 21:40

Your method is called NCO_single_ended_mode but you use PLL single ended (%0_00010_000 << 23). The latter requires a feeder setup for 4..8MHz, using $80_0000 will give you clkfreq/512 which is way out of spec here. If you meant to use an NCO (%0_00100_000 << 23) then use $8000_0000 to achieve clkfreq/2 output.

ADZ_916 · 2013-02-14 21:47

When pasting the code it deleted the %00 preceding the ctr a & b values. The frequency was arbitrarily chosen as it looked good on the scope. Interestingly enough I just tried the same code but with a cognew call and the jitter is gone however a phase difference remains. Perhaps you could help me understand what is going on here?

-ADZ

kuroneko · 2013-02-14 21:54

Can you add your complete code as an attachment? FWIW, I saw the %00 initially but then they disappeared.

ADZ_916 · 2013-02-14 22:02

Here is the code. as stated before it is pretty much the same as in AN001 with the addition of ctrb and a couple zeros deleted from frq:

test1.spin

kuroneko · 2013-02-14 22:09

ADZ_916 wrote: »

Here is the code. as stated before it is pretty much the same as in AN001 with the addition of ctrb and a couple zeros deleted from frq ...

So do you want to use NCOs or PLL based counters? ATM it's a rather unstable PLL setup.

Also, you should only setup the counters once. Doing it in a repeat loop is wasted effort and may affect current operation.

ADZ_916 · 2013-02-14 22:16

Ahh I see what I missed there, I added the two missing 0 bits. What I would like to do is generate two square waves of around 470,000hz so that I can play with the phase relation and try and learn a little bit about the counters. On that note how do I go about calculating the value to send to frqa?

kuroneko · 2013-02-14 22:21

ADZ_916 wrote: »

On that note how do I go about calculating the value to send to frqa?

For an NCO it's frqx = f * 2³²/clkfreq. I'm fairly sure it's mentioned in the AN.

ADZ_916 · 2013-02-14 22:51

Thanks so much! Was able to throw together some quick code to read my ABC rotary encoder to adjust the phase of counter A. I've attached the code and am looking for any comments or criticisms. Thanks again I still have much to learn about the great mystery that are the counters.

-ADZ

test1.spin

ADZ_916 · 2013-02-14 23:03

One more quick question, how would I track an input signal and adjust the phase of an output tracking the inputs frequency?

kuroneko · 2013-02-14 23:18

ADZ_916 wrote: »

One more quick question, how would I track an input signal and adjust the phase of an output tracking the inputs frequency?

You could detect an edge of the input signal and capture the current output counter. Based on that value add/sub an adjustment value. Note that SPIN code aliases to the hub window. IOW while you could capture an edge down to a single system clock cycle once you're back in SPIN (to grab phsx_out) you lose some accuracy. Depending on the frequency used this may not be too much of an issue. PASM would allow for more accurate control.

ADZ_916 · 2013-02-14 23:21

Thanks! Where would you point someone to learn the basics of PASM?

Jitter between two counters

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