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Propeller 2 Package Information ( PCB Footprint ) - Page 2 — Parallax Forums

Propeller 2 Package Information ( PCB Footprint )

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Comments

  • rod1963rod1963 Posts: 752
    edited 2013-02-19 13:11
    Hopefully if sales and visibility is good, we can get a VAR like Olimex to produce boards as well. They seem to do a good job and a decent price.
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2013-03-09 17:36
    jazzed wrote: »
    I hate to say it, but 0.4mm won't work for me. 0.5mm pitch is fine.
    It's not about soldering skills. It's about PCB trace widths and clearances.

    A 0.4mm pitch device requires a trace and space design rule that is less than 6mil.
    This means I can't use cheap PCB services that need >= 7mil rules.

    With 0.5mm pitch there are no such problems.

    While I do not intend to make "developer" boards, I do have ideas for products, and 0.4mm spacing puts the current P2 plan off my radar.

    Now why not do your own (works well for single day runs of less than 64 boards). Using laser Toner transfer for masking and standard ferric chloride etching it is very easy to get down to 1.5 3 mil no problem, and with a little extra effort much smaller (though going to much smaller will take it over to photo masking).
  • photomankcphotomankc Posts: 943
    edited 2013-03-11 07:38
    I'd love to hear more about the process you use to get down to 1.5 mil spacing with toner transfer.
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2013-03-11 18:39
    photomankc wrote: »
    I'd love to hear more about the process you use to get down to 1.5 mil spacing with toner transfer.

    Actually fairly simple:

    First a couple of tips:
    Older high resolution Laser printers work the best.
    Make the material that you are printing on is extremely smooth, and will not transfer along with the toner, also be sure that it will not melt during the process.
    Take extreme care in alignment with out any rubbing when positioning the sheet on the board.
    Make certain that the sheet is tight and smooth before, during. and after taping to the board.

    And the method (pretty much standard toner transfer).
    1. Clean your copper clad board, making sure that there are no surface scratches.
    2. Print out the transfer using a high enough resolution Laser printer on a smooth sheet that can take the heat.
    3. Carefully heat the printed sheet to help hold the pattern in place long enough.
    4. Press onto copper clad board, tape down.
    5. Apply heat and pressure, remove original while still hot enough for the toner to be semi permeable though not hot enough to flow. (you could try using the scrub away method though I do not know if that would work at the smaller scales).
    6. Check final to confirm that it is within spec, and that nothing ran, if needed redo.

    Practice helps alot. When making boards with such fine details it is easy to smear something or accidentally create a crease in the material being printed onto.

    For double sided boards you will wish to include a good thin boarder to use to align the two sides, and make sure that any through holes, or vias have the needed tolerance.


    And that is all there is to it. I often begin with a double sided copper clad board measuring 12 inches square (purchased from a local vendor). Beings as most of my boards measure 2.9 inches square (including the small dead space around the edges) this gives me 16 boards at a go. Does this answer your question??
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2013-03-11 18:45
    photomankc wrote: »
    I'd love to hear more about the process you use to get down to 1.5 mil spacing with toner transfer.
    Sorry my err there I meant 3 mil.
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2013-03-12 18:49
    Has any one heard if there will be a QFN available? It would be nice to save a little board space, and get some of the traces closer to gather at the package.
  • jmgjmg Posts: 15,140
    edited 2013-03-13 20:57
    Has any one heard if there will be a QFN available? It would be nice to save a little board space, and get some of the traces closer to gather at the package.

    Board savings from QFN are mostly an illusion, unless you have high layer counts, because you cannot place vias under the chip.
    That invariably creates a contention area where you have to place a cluster of vias, and so the fan-out-included size is not the gain imagined.
  • pedwardpedward Posts: 1,642
    edited 2013-03-13 22:58
    For once jmg and I agree! QFN *is* useful for power dissipation though, but in the case of the P2, I agree about needing all of the space you can muster.
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