P2 projects?
![David Betz](https://forums.parallax.com/uploads/userpics/893/nN1UDRLBNVC24.jpg)
Things have gotten kind of quiet in here. What sorts of things are people working on with their DE0-Nano and DE2-115 FPGA boards? I've been plugging along with PropGCC and have recently been joined by Eric Smith who is the project lead for the PropGCC P2 effort. I've checked in a bunch of new stuff but haven't made a new release yet. Mainly, I've gotten SD support working and have added P2 support to propeller-load making p2load unnecessary at least for C/C++ program loading. What are other people doing with their boards?
Comments
I only test instructions and program snippets before NANO PCB arive
I can only dream up on DE2-115.
Happy I have NANO with help of Bill.
Hopefully Chip will have time to add support for the on-board SDRAM on the Nano in the near future.
Sapieha's board for the Nano has a SPI flash chip that will probably be easier to use than SDRAM. I think SDRAM support is going to require its own COG to handle things like refresh.
Chip added an XFER instruction to burst up to 64 longs from SDRAM to the CLUT, which could be flushed to the hub, so by restricting the size of FCACHE or FLIB the requirement for a second cog should be avoidable.
Besides, there are other uses for SDRAM such as high resolution - high color video drivers
I belive so. I am eagerly awaiting documentation for the XFER and video related instructions - and all other new features/instructions ofcourse
As I recall P2 will require 3.3V compatible IO. Which device were you considering that will work with self-refresh during active operation?
I was referring to self refresh when the SDRAM is not selected, I will manually refresh it as needed - it's not a big deal.
Chip mentioned 1.8V IO being much slower than 3.3V IO before. Wonder if it's still true ....
Yes, I have some of those around here. The amount of code required to make it work is more than I would like, but the burst nature is very useful for a cache (and other things). With more RAM we can do better set associative caching. I remember Chip saying something similar to "the SDRAM is like a train to get started".
I don't plan to design any P2 "platform hardware" this time as I'm sure Parallax hardware will suit my needs perfectly until I'm ready design a product prototype. Besides, I have enough to do already.
I do have some interesting product ideas though (not related to micro-controller platforms at all).
Your observation produced a twinge of guilt. I should be writing code or documentation. Instead I'm working night and day on ARM and P1 projects. But I read every single post on the P2 forum and admire all that has been achieved in such a short time.
Too many chips, too many interests, and not enough time!!
One good project which can be done with P2 is an one chip retrocomputer. With 10x more processing power than P1 and ~128 kB of RAM I think all 8-bit computers can be emulated with it.
If the planets align I'm hoping to put together an interesting demo system based around a Grandstream GXV3500 video to IP converter,combining its RS485 and digital signals to interact with a DE2, some I/O, and its development PC.
Like others around here I have a few neat ideas for demonstration boards. It's going to be a blast once it all gets going.