FR-4 Copper Power Layer
sunblock
Posts: 55
I am polishing up the final traces on a FR-4 PCB board I plan to submit to ExpressPCB. The power layer is a complete copper pour (minus a few vias and DIP pin holes), as is the ground plane. My question is, and there are a number of varying opinions on the subject so I'm throwing this out there, "Is it better to remove as much of the copper pour on the power layer as possible, using the 'Keep Out Of...' exclusion polygons?" Just playing with the design (after I saved it twice), I find can remove almost 90% of the power layer's copper pour. I know the answer will depend on multiple factors, so I guess I'm looking for a general practice set of answers. Thanks and I hope everyone is having a good holday.
Comments
Duane J
PCB production is mainly additive I believe, so that doesn't follow: http://infohouse.p2ric.org/ref/28/27484.pdf
In the big picture of things these quantities are considered small.
I have discussed these issues, to copper pour or not to pour, a number of times and the consensus is they don't care and don't give me a break either way.
Things get more interesting with quantities of 100,000 or more.
Duane J
Do you have a special reason not to fill the layer?
Duane J
But here is some info about internal power planes:
Quote: Having discouraged the use of power planes it seems only right that I should give a method for power
distribution on a good practice PCB.I always use the thinnest rather than the thickest tracks I can.
http://ocw.bib.upct.es/pluginfile.php/8158/mod_resource/content/1/Best_practice_in_circuit_board_design.pdf