High Speed Sampling

blittled

I've been toying with the idea of doing some high speed sampling of a computer 16 bit address bus or PropScope and I am unclear with some concepts. Using the specs from a PropScope I would have a 100MHZ clock (6.25 MHz crystal X 16) and sample the inputs and store the 32 bit value in HUB memory at 25M samples per second. This would require reading in data every 4 clock cycles. Since the HUB is accessible to each cog for 2 clock cycles you would have to use 4 cogs staggered at Cog 1, 3, 5, and 7 to read in correctly. That would require a very tight loop in each cog consisting of 16 clock cycles so it can be ready for the next sample.

Now it is my understanding that WRWORD INA, ADDR + Offset (offset in COG1 = 0, COG3 = 4, COG5 = 8, COG7 = 12) would take 8 cycles when you have HUB access and you would need a JMP which is 4 cycles. That leaves only one 4 cycle operand to increment or decrement ADDR by 16. But you would have to know when you hit your HUB Buffer limit and reset the ADDR to the start of the HUB Buffer so that adds to the cycle time and cause the sampling to slow down.

Does anyone have an idea on what code would be required for the loop so it can continuously sample at 25M samples per second?

MagIO2

There is a trick I think! You can setup a counter to count the addresses instead of incrementing via add. Then you use PHSA in the wrword.

This is then the fastest possible way to move things from COG to HUB-RAM. But I think that there is no way of continuously sample at this rate because you won't find any driver which continuously can write stuff from HUB-RAM to a mass storage device. So, after 32kB - program-size you have to stop sampling, which is far below a second at 25MHz and 16 bit.

kuroneko

@blittled: Have a look at [post=1017486]this thread[/post]. It stores a whole long but you'll get the idea (this can be shortened to a word provided the bus is in the right place, which seems to be the case here).

And before I forget, wrword ina, addr only transfers shadow[ina], most of the time not what you want.

Mark_T

You can sample to cog ram at 25MHz with unrolled loop for say 256 longs, then use a self-modifying loop to write writing those cog values to hub ram at 1/4 the rate. Using four more cogs with staggered timing fills in the gaps?? Not easy to stop this though.

If you only want a finite set of samples you can sample purely to cog ram of two cogs, and have some mechanism to trigger them to both stop and dump cog to hub ram.