How to dither the edge of a signal ?

Bean

I have a project where I am mixing two signals ~10.000000MHz and 10.005000Mhz and getting the difference (~5KHz) as a squarewave.
Then I need to measure the period of 5000 cycles of the ~5KHz signal (~1 second) very accurately.
I am using the "cnt" so I have a 80MHz count speed.
The problem I have is that the count that I get is always a multiple of 8 because the ~5KHz signal edge alway occur at the edge of the 10MHz input.

So what I'm looking for is a way to dither the edge of the 5KHz signal so I don't always get a multiple of 8 for the count.

Kind of how they inject noise into a ADC and do multiple samples to get better resolution.

Any ideas how I would do this ?

Any questions please ask.

Thanks,
Bean

Duane C. Johnson

Hi Bean;

One of the simplest variable delays is to introduce shifting of the trigger point.

The signal rise time is degraded through R1-C1.
The sawtooth then introduces a shift in the level through R2.

OK, I didn't test this but the concept is there.
None of the values are particularly critical.
R2 should be quite a bit larger than R1.
R1 * C1 is about 100nS or so, (8 times 12.5nS).

Duane J

jmg

If I have followed this right, you do not need to dither, so much as remove the 10MHz.

If you feed 2 signals into a XOR gate, they should phase-walk range from in-phase to out-of phase every 200us, so if you feed that into a band/low pass filter and then square it, you should remove the 10Mhz edge effects ?

From memory, the best linear systems are good for around 1:20,000 of jitter, so you should get to ~10ns
(perhaps a differential comparator, fed from dual filters from XOR/XNOR, would buy a little more)

If you need a 'second opinion counter', try the one here
http://www.daqarta.com/dw_freq.htm
Rather than the single slice of a comparator, this measures multiple waveform points and uses the ADC's Y axis resolution, to better interpolate the X true zero crossing value. So it will work better with sine/triangle than square.

evanh

I'm not sure dithering is what you want. Since this is an accumulation, interpolation of the start and end sounds more suitable than suppressing sample bias.

EDIT: Oops, jmg saying similar things ...

Bean

Thanks Duane something like that is what I need.

jmg, this is not an XOR type mixer. It does not produce that type of output. The output is a digital squarewave that is the difference between the two input frequencies. The issue is that each output pulse edge can only occur at the rising edge of the one input. So with a 10MHz input the output wave will always have a period that is a multiple of 0.1 seconds. So the periods will switch between two consecutive values (such as 200.2uSec and 200.3uSec). Since I am taking the sum of many cycles the sum will also always be a multiple of 0.1uSec or 8 propeller clocks. Actually now that I spell it out, maybe there isn't a way to make it any better...

If we can't make it better, we will have to fall back to using the XOR type anyway.

We are designing an oscillator measurement system that can measure multiple units to within 1-2 ppb (parts per billion) every 10mSec. This is to look for noise, spurs and/or microjumps over temperature. Cool stuff...

P.S. This is a continuation of this propeller project http://www.youtube.com/watch?v=fkYL7fluv5E

Bean

Phil Pilgrim (PhiPi)

Bean,

What are you using for a mixer? If it's something like an SA602 doubly-balanced mixer, you could low-pass filter both inputs to sine waves and get sine wave outputs. Then filter out the 20.005 MHz sum component, leaving a 5 KHz sine wave to measure. I have a feeling that, whatever kind of mixer you use, trying to mix square waves will still give you the edge-alignment problems you're experiencing. The SA602 also has a built-in oscillator that you could use for the reference frequency if you have an accurate-enough crystal.

Note: If this is for work, posting here may be risky, in light of the NDA issues you brought up in another thread.

-Phil

jmg

Bean wrote: »

Actually now that I spell it out, maybe there isn't a way to make it any better...

If we can't make it better, we will have to fall back to using the XOR type anyway.

You could multiply the comparisons, but then you've added a PLL, and if you want to measure stability, and microjumps that's not a good thing to do.
Given each cycle advances by 50ps, it is hard to go past a XOR style mixer.

I'd look at a good sound card / Audio ADC and PC software.
192KHz gives you 1920 samples in your 10ms window, and you then 'fit' that to a frequency - start with zero cross interpolate and then use that to do an all-points fit.

On the chip front, FPGA/CPLD should allow 200MHz+ reciprocal frequency counting, of the LPF Slice output, which moves your LSB to well under 1ppb
A Prop 1 will overclocked to 100MHz will still be < 1ppb LSB.

It is a pity capture is not better supported on Embedded chips - a number now offer fractional PWM, down to sub-ns resolve of output edges, but it is less common to see fast capture blocks.

Even the Blackfin, which has 400MHz cores, only specs a 100MHz Timer clock.
TI's RAM based Delfino specs 300MHz, but is less clear on Timer/Capture speed.

Mark_T

That's not a linear mixer, so you are injecting sidebands and losing information.

If you can measure the difference period to an accuracy of 8 / 8*10^7 then you are effectively measuring the input frequencies to a precision of 1 part in 2*10^10 - how much more do you want?

The Art of Electronics chapter 15 has a section called "Period (reciprocal counting)" that describes how in principal to measure a 1MHz frequency to 1 part in 10^12 in 1 second - you need analog signals, a linear mixer, and very good S/N ratio. It also says that 1 part in 10^10 is more likely to be the practical limit - you are there already!

jmg

Mark_T wrote: »

The Art of Electronics chapter 15 has a section called "Period (reciprocal counting)" that describes how in principal to measure a 1MHz frequency to 1 part in 10^12 in 1 second - you need analog signals, a linear mixer, and very good S/N ratio. It also says that 1 part in 10^10 is more likely to be the practical limit - you are there already!

Bean is looking to not leave precision on the table.
He is looking for parts per billion, but at 100Hz update rates.
1ppb at 10MHz is 2ppm at 5000Hz, so the 2ppm precision point is 20ns resolve in a 10ms window.

If Bean can avoid the 100ns quanta effects (from what sounds like a D-FF mixer ), then he can chase fractional ppb.

A prop can resolve to 10ns, and if the jitter is << 10ns, then perhaps with multiple timers and a magic delay line, you could vernier to 1-2ns 10ns on 200us is 1:20,000, or in voltage domain, 165uV sawtooth, or 330uV triangle.
To chase 66uv for 2ns is sounding perhaps doable, but would need second order filters, and differential. (2ns is 0.1ppb/10ms or equal to that 10^12/second),

10ms is 50 cycles, so even a moderate Q bandpass would help integrate the energy - an advantage here, is you are not looking for wide capture.
An ADC capture would allow a software bandpass + Zero cross derive.

Bean

We found that we have to use a 100Hz offset frequency instead of 5KHz. Using an XOR mixer and measuring 1 cycle of the 100Hz output gives us the 1-2ppb measurements we are looking for.
We are not sure how much noise in in the sources, but they are the lowest noise source we could muster.

Bean

jmg

Bean wrote: »

We found that we have to use a 100Hz offset frequency instead of 5KHz. Using an XOR mixer and measuring 1 cycle of the 100Hz output gives us the 1-2ppb measurements we are looking for.

If you can easily change to 100Hz, and that bandwidth is ok, then you should be better than 1ppb in the time domain ?
1-(10e6+.01)/10e6 = -1.0e-9 ie .01Hz at 10Mhz is 1ppb
1-(100+.01)/100 = -1.0e-4 or in time ans*10m = -1.0e-6, so 1us is 1ppb via that 100Hz beat. 1:10,000 as a ratio.

You could also re-check the D-FF mixer, with lower offset, it can update in 100ns, but the phase advance at 100Hz is now a rather small sounding 1ps/cycle (!), you could check that to see the aperture + jitter effect, and if you see multiple edges on the 100Hz.
It does give you a good way to measure aperture+jitter

Perhaps ~1KHz would be a better balance for D-FF, uses the 100ns update for 1ppb, but now moves a better sounding 10ps/cycle.

I wonder if something like a ECL D-FF, would be a better sampler ?
http://www.onsemi.com/PowerSolutions/product.do?id=NB4L52
http://www.onsemi.com/PowerSolutions/product.do?id=NBSG53A
- but we are now getting more expensive and esoteric than a XOR + Good filter.

Bean

jmg, We tried both a PECL and a CMOS D-FF subtracter. Neither was as good a the XOR mixer with a simple R-C filter. Input -> Inverter to square -> XOR -> R-C -> Inverter to square -> Prop Pin

The PECL was nice because it could go up to 1GHz, but it was not as good as the XOR plus the current was MUCH higher.

Bean

Lawson

If you want a logic gate with better jitter specs, Micrel has an "any-gate" that can be wired as an XOR. sy55851-51 Ideally you'd have a pair of input comparators with similar speed on the inputs, but this part has "any-in" inputs compatible with many differential logic series. This effectively means the inputs are high speed comparators anyway. (though no specs are given...) This is a CML part so it only needs one supply and output termination is to Vcc.

Micrel also has a ripple counter you can clock over 1GHz sy10-100e137. For yet more precision, it might also be fun to try ACAM's Time-To-Digital-Converters. Still, with an overclocked propeller as a base, using a tapped delay line and 6 counters/ 3 cogs you should be able to reach a 900MHz or greater equivalent count rate without needing a custom PCB. (nine about one foot sections of coax should work well for the delay line.)

Lawson