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Help with system clock! — Parallax Forums

Help with system clock!

SONIC the HedgehogSONIC the Hedgehog Posts: 321
edited 2012-09-27 18:10 in Propeller 1
I found this file, and Setting up requires me to set a value to constant, however I need to be in the number of system clocks, and the max is 65536 clocks, but I don't understand how to do that. Any help at all would be greatly appreciated. I'm pasting the source code directly from the post, and thanks to David Voss for writing it, but what I need to give a value is PWM_RES, but like I said, I don't know how to give it a value that represents system clocks.
/*******************************************************************************
 Module:        pwm.S, v.0.1, 16 August 2012
 
 Written by:    David Voss, Tree of Life Foundation Renewable Electronics,
                Patagonia, AZ


 Target:        Parallax Propeller P8X32A, prop-gcc, memory model = cog


 Purpose:       System Clock Speed PWM driver with (2) outputs


 PAR holds the hub RAM address of the [2] 16-bit duty cycles.  If you only need
 1 PWM output, don't #define PWM_B_PIN in the header file, and the code will be
 a little smaller.
 
 Software stepping of the remaining bits of the (max) 16-bit duty cycle is
 implemented to increase the duty cycle resolution while still having a high PWM
 rate (short PWM period). To implement this, both the PWM resolution and the PWM
 native resolution should be a power of 2. If you don't need this, comment out
 #define PWM_STEPPING in the header file, and the code will be a lot smaller.


 The following symbols should be #defined in the processor-specific header file:
 
        PWM_A_PIN
        PWM_B_PIN (if implemented)
        PWM_RES                     // In System Clocks (max = 65536)
    #ifdef  PWM_STEPPING
        PWM_NATIVE_RES              // In System Clocks (min = 256 ==> 391 kHz)
        PWM_STEPPING_BITS           // = log2(PWM_RES) - log2(PWM_NATIVE_RES)
    #endif
*******************************************************************************/


#include "main.h"                   // Pin assignments, PWM resolution, and 
                                    //   #define PWM_STEPPING (or not) are here


#define CTR_PWM_MODE            %0_00100_000
#define dutyA_ptr               PAR
#define dutyA                   OUTB            // Save a little Hub RAM...
#define periodStart             DIRB            // ""


            .org      0
            .cog_ram


pwm_driver: movs    CTRA, #PWM_A_PIN            // Set the output pin
            movi    CTRA, #CTR_PWM_MODE         // Set counter mode to PWM
            mov     FRQA, #1                    // Set Frequency to System Clock


            or      DIRA, diraSet               // Set data direction register


    #ifdef PWM_B_PIN
            mov     dutyB_ptr, PAR              // PAR is a ptr to PWMmbox {
            add     dutyB_ptr, #2               //      unsigned short  DutyA;
                                                //      unsigned short  DutyB; }
            movs    CTRB, #PWM_B_PIN
            movi    CTRB, #CTR_PWM_MODE
            mov     FRQB, #1
    #endif


            mov     periodStart, CNT            // Initialize start from the
    #ifdef PWM_B_PIN                            //   system counter
            add     periodStart, halfPeriod
    #else
            add     periodStart, period
    #endif


pwm_loop:
        #ifdef PWM_STEPPING
                rdword  unsteppedDutyA, dutyA_ptr
                mov     carryA, unsteppedDutyA
                shr     unsteppedDutyA, #PWM_STEPPING_BITS
                shl     carryA, #(32 - PWM_STEPPING_BITS)
                mov     steppingCtr, steppingCount
        #else
                rdword  dutyA, dutyA_ptr
        #endif
    #ifdef PWM_B_PIN
        #ifdef PWM_STEPPING
                rdword  unsteppedDutyB, dutyB_ptr
                mov     carryB, unsteppedDutyB
                shr     unsteppedDutyB, #PWM_STEPPING_BITS
                shl     carryB, #(32 - PWM_STEPPING_BITS)
        #else
                rdword  dutyB, dutyB_ptr
        #endif
    #endif
        #ifdef  PWM_STEPPING
            native_pwm_loop:
                    mov     dutyA, unsteppedDutyA
                    add     accumulatorA, carryA        wc
            if_c    add     dutyA, #1
        #endif
    #ifdef  PWM_B_PIN
                    waitcnt periodStart, halfPeriod   // Start PWM B 180 deg out
    #else                                             //   of phase from PWM A to
                    waitcnt periodStart, period       //   reduce electrical noise
    #endif
                    neg     PHSA, dutyA


    #ifdef  PWM_B_PIN
        #ifdef  PWM_STEPPING
                    mov     dutyB, unsteppedDutyB
                    add     accumulatorB, carryB        wc
            if_c    add     dutyB, #1
        #endif
                    waitcnt periodStart, halfPeriod
                    neg     PHSB, dutyB
    #endif


    #ifdef  PWM_STEPPING
                    djnz    steppingCtr, #native_pwm_loop
    #endif
                jmp     #pwm_loop


#ifdef PWM_B_PIN
    diraSet:            .long   (1 << PWM_A_PIN) + (1 << PWM_B_PIN)
    #ifdef PWM_STEPPING
        halfPeriod:     .long   PWM_NATIVE_RES / 2
    #else
        halfPeriod:     .long   PWM_RES / 2
    #endif
#else
    diraSet:            .long   (1 << PWM_A_PIN)
    #ifdef PWM_STEPPING
        period:         .long   PWM_NATIVE_RES
    #else
        period:         .long   PWM_RES
    #endif
#endif




#ifdef  PWM_STEPPING
    steppingCount:      .long   1 << PWM_STEPPING_BITS
    steppingCtr:        res     1
    unsteppedDutyA:     res     1
    accumulatorA:       res     1
    carryA:             res     1
#endif


#ifdef  PWM_B_PIN
    dutyB_ptr:          res     1
    dutyB:              res     1


    #ifdef  PWM_STEPPING
        unsteppedDutyB: res     1
        accumulatorB:   res     1
        carryB:         res     1
    #endif
#endif

Comments

  • RaymanRayman Posts: 14,670
    edited 2012-09-26 18:34
    I think in this context that a system clock is 12.5 nanoseconds (assuming 80 MHz clock speed).
  • SONIC the HedgehogSONIC the Hedgehog Posts: 321
    edited 2012-09-26 18:40
    Rayman wrote: »
    I think in this context that a system clock is 12.5 nanoseconds (assuming 80 MHz clock speed).
    I kinda get that, but it says that i need to set a value between 1 and 65536 system clocks, so what is the command that I use. I guess what I'm saying is I don't understand the syntax needed, would it use CLKFREQ constant? Would it be like CLKFREQ >> (somevalue)
  • RaymanRayman Posts: 14,670
    edited 2012-09-27 10:52
    I think I would try to get hold of David Voss and has him... This looks to be an optional argument to provide additional resolution.
    One comment makes it look like it needs to be a power of 2 also.
  • SONIC the HedgehogSONIC the Hedgehog Posts: 321
    edited 2012-09-27 10:58
    Rayman wrote: »
    I think I would try to get hold of David Voss and has him... This looks to be an optional argument to provide additional resolution.
    One comment makes it look like it needs to be a power of 2 also.
    Yeah I was a tad bit frustrated, but after looking at it I think I figured it out amd understand it a little better. Thanks for the help!
  • cavelambcavelamb Posts: 720
    edited 2012-09-27 18:10
    Looks like PWM_RES is actually the ON time for Period...

    How lone will your ON time be?
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