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low pass filter while sharing a pull up resistor question — Parallax Forums

low pass filter while sharing a pull up resistor question

BitsBits Posts: 414
edited 2012-09-12 15:54 in General Discussion
In the circuit I have below R2 and R5 are a sensor, R1 and R4 create a voltage divider. Now r3 and c1 create a lowpass filter where c2 creates what? Is it still a low pass filter using the equation 1 / (2 * 3.14 * R * C) or becomes somethinig different?

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Comments

  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-09-12 13:12
    The second schematic also comprises a low-pass filter, but the RC time constant must be calculated with R4 and R5 in parallel, i.e. 5K.

    BTW, in the first schematic the net resistance for computing RC is 6K (5K in series with 1K).

    The reason that the 10K resistances are considered for AC analysis to be in parallel, is that Vdd is equivalent to AC ground.

    -Phil
  • skylightskylight Posts: 1,915
    edited 2012-09-12 13:33
    @Phil I'm not sure I understand what you are saying regarding the second schematic, isn't it a series parallel circuit with only R5 in parallel with C2 and R4 in series with C2 and R5 , why the parallel resistance calc to get 5K?
  • BitsBits Posts: 414
    edited 2012-09-12 13:40
    Does it matter that R2 and R5 change resistance a great deal? This may require me to forgo the passive low pass filter and use an active low pass filter/
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-09-12 13:41
    As I explained in my prior post, you need to treat Vdd as ground for AC analysis. So both 10K resistances are in parallel to ground.

    -Phil
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-09-12 13:45
    Bits wrote:
    Does it matter that R2 and R5 change resistance a great deal?
    It depends upon what a "great deal" is and what kind of stuff you need to filter out. You can ameliorate the effect of changing resistances by using your first schematic, with a higher value for R3 and commensurately lower value for C1, assuming the higher output impedance is not an issue.

    -Phil
  • skylightskylight Posts: 1,915
    edited 2012-09-12 14:07
    Phil Pilgrim (PhiPi) wrote: »
    As I explained in my prior post, you need to treat Vdd as ground for AC analysis. So both 10K resistances are in parallel to ground.

    -Phil
    Confused :lol:
  • Beau SchwabeBeau Schwabe Posts: 6,568
    edited 2012-09-12 14:39
    There was a similar thread ... or at least the reference to Vdd and Vss have similar characteristics.

    http://forums.parallax.com/showthread.php?141620-unknown-reason-for-prop-reseting&p=1114977#post1114977
  • skylightskylight Posts: 1,915
    edited 2012-09-12 14:59
    I was treating the above circuits as DC circuits and was getting confused where the AC analysis comes from? Is Vdd not just positive in this case? I'm really getting a headache here lol
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-09-12 15:20
    The premise behind Bits' inquiry is that there is fluctuation or noise on R2 that needs to be filtered out. That noise is an AC signal, which is subject to low-pass filtering via an RC circuit. For the purpose of analyzing such a circuit from the standpoint of its AC response, all low-impedance voltage sources and sinks are treated the same: as ground.

    -Phil
  • skylightskylight Posts: 1,915
    edited 2012-09-12 15:54
    Ah now I get it, I was looking at it as a RC TIME functional circuit alone so the circuit has a dual function as filter and to allow the uC to read the sensor as well if i'm reading you correct Thanks Phil
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