Options for expanding pins and building a hi speed bus for propeller?
rwgast_logicdesign
Posts: 1,464
So this is something that I have been giving alot of thought too lately. What would it take to get more I/O lines with the propeller that are reasonably quick closest to directly attaching something directly to the propeller?
Heres a case use to make the question more clearn. So lets say your building a board and you want to put a few expansion headers on it lets say 3 or 4 headers/slots with somewhere between a 4-16 pin interface. Now the propeller obviously only has 31 io lines so if you hooked vga/sd/keyboard up there is no way you could pull off all those expansion slots. The thing is I see home brew z80/6502 projects which have IDE, RAM, Video, kb, and other stuff, those two cpu's are also only 40 pin dips like a prop. So how are these guys building a bus to say attach IDE or display video and still getting enough speed? I mean I have a few shift registers and i2c io expanders but i think those are gonna be a super slow way to say attach 40pin IDE to a propeller, or even a decent amount of SRAM. How are these guys solving this problem? Even if say you attached a second propeller to handel ide and send the info back to a central propeller your still going to need enough data lines to the central propeller to get any kind of speed... I understand the z80 guys are using an ide controller chip which is probably helping the i/os quite a bit but if you wanted to have genral slots people could build cards for like the apple 2 what would be the best way of implementing this? Imean the apple 2 is using that 40 pin 6502 and it accepts a ram card in its socket so obvioulsy there is a way to provide a bus quick enough to that card for ram while somehowe connecting it all to a 40pin dip..
Heres a case use to make the question more clearn. So lets say your building a board and you want to put a few expansion headers on it lets say 3 or 4 headers/slots with somewhere between a 4-16 pin interface. Now the propeller obviously only has 31 io lines so if you hooked vga/sd/keyboard up there is no way you could pull off all those expansion slots. The thing is I see home brew z80/6502 projects which have IDE, RAM, Video, kb, and other stuff, those two cpu's are also only 40 pin dips like a prop. So how are these guys building a bus to say attach IDE or display video and still getting enough speed? I mean I have a few shift registers and i2c io expanders but i think those are gonna be a super slow way to say attach 40pin IDE to a propeller, or even a decent amount of SRAM. How are these guys solving this problem? Even if say you attached a second propeller to handel ide and send the info back to a central propeller your still going to need enough data lines to the central propeller to get any kind of speed... I understand the z80 guys are using an ide controller chip which is probably helping the i/os quite a bit but if you wanted to have genral slots people could build cards for like the apple 2 what would be the best way of implementing this? Imean the apple 2 is using that 40 pin 6502 and it accepts a ram card in its socket so obvioulsy there is a way to provide a bus quick enough to that card for ram while somehowe connecting it all to a 40pin dip..
Comments
Probably then, you'd want to use some latchable buffers... Maybe look at the SDRAM or SRAM threads to see how they did it...
┌─────────────────────────────────┐ ┌─────────────────────────────────┐ │ TPIC6595 │ │ 74HC165 │ ├────────┬───────┬────────┬───────┤ ├────────┬───────┬────────┬───────┤ │ PIN │ SIG │ PIN │ SIG │ │ PIN │ SIG │ PIN │ SIG │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 1 │ PGND │ 11 │ PGND │ │ 1 │ LD │ 9 │ SOut │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 2 │ Vcc │ 12 │ RCK │ │ 2 │ CLK │ 10 │ SIN │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 3 │ SDAT │ 13 │ SRCK │ │ 3 │ D4 │ 11 │ D0 │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 4 │ D0 │ 14 │ D4 │ │ 4 │ D5 │ 12 │ D1 │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 5 │ D1 │ 15 │ D5 │ │ 5 │ D6 │ 13 │ D2 │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 6 │ D2 │ 16 │ D6 │ │ 6 │ D7 │ 14 │ D3 │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 7 │ D3 │ 17 │ D7 │ │ 7 │I_SOut │ 15 │ CE │ ├────────┼───────┼────────┼───────┤ ├────────┼───────┼────────┼───────┤ │ 8 │ SRCLR │ 18 │ SEROUT│ │ 8 │ Vss │ 16 │ Vcc │ ├────────┼───────┼────────┼───────┤ └────────┴───────┴────────┴───────┘ │ 9 │ G │ 19 │ LGND │ ├────────┼───────┼────────┼───────┤ │ 10 │ PGND │ 20 │ PGND │ └────────┴───────┴────────┴───────┘ +5.0Vdc  3.3kΩ ┌───────┴────────────────┐ (74HC165_SDAT)──────┤SOut Vcc LD├───────┳────(74HC165_LD) │ │ │ ┌─┤CE CLK├───────┼─┳──(74HC165CLK) │ │ (74HC165.1) │ │ │ ┣─┤Vss SIN├─────┐ │ │ │ │ │ │ │ │  │D0 D1 D2 D3 D4 D5 D6 D7 │ │ │ │ GND└─┬──┬──┬──┬──┬──┬──┬──┬─┘ │ │ │ +5.0Vdc │ │ │ │ │ │ │ │ │ │ │  │ │ │ │ │ │ │ │ │ │ │ │(10kΩx8) │ │ │ │ │ │ │ │ │ │ │ ┣───────┼──┼──┼──┼──┼──┼──┼──┫ │ │ │ ┣───────┼──┼──┼──┼──┼──┼──┫ │ │ │ │ ┣───────┼──┼──┼──┼──┼──┫ │ │ │ │ │ +5.0Vdc ┣───────┼──┼──┼──┼──┫ │ │ │ │ │ │  ┣───────┼──┼──┼──┫ │ │ │ │ │ │ │ ┣───┐ ┣───────┼──┼──┫ │ │ │ │ │ │ │ │ ┌──────────┴───┴──────────┐ ┣───────┼──┫ │ │ │ │ │ │ │ │ │ │ Vcc  │ └───────┫ │ │ │ │ │ │ │ │ │ │ (TPIC6595_SERIN) ────────┤SDAT SRCLR │ │ │ │ │ │ │ │ │ │ │ │ │ │(470Ω x8) │ │ │ │ │ │ │ │ TP │ │ │ (TPIC6595_SCK) ────┳───┤RCK D0├─────────┻──┼──┼──┼──┼──┼──┼──┼──┬01┐ │ │ │ │ │ (TPIC6595.1) D1├────────────┻──┼──┼──┼──┼──┼──┼──┤02│ │ │ │ (TPIC6595_SRCK) ──┳─┼───┤SRCK D2├───────────────┻──┼──┼──┼──┼──┼──┤03│ │ │ │ │ │ │ D3├──────────────────┻──┼──┼──┼──┼──┤04│ │ │ │ │ │ │ D4├─────────────────────┻──┼──┼──┼──┤05│ │ │ │ │ │ ┌─┤SOut D5├────────────────────────┻──┼──┼──┤06│ │ │ │ │ │ │ │ _ D6├───────────────────────────┻──┼──┤07│ │ │ │ │ │ │ │ PGND(x4) LGND G D7├──────────────────────────────┻──┴08┘ │ │ │ │ │ │ └────────┬───────┬───┬────┘ ~ ~ ~(Seperated into 2 busses) │ │ │ ┣───────┻───┘ │ │ │ │ │ │  ┌─────────────────────────────────┘ │ │ ┌──This reference──┐ │ │ │ GND │ +5.0Vdc │ │ │ Schematic shows │ │ │ │ │  │ │ │interconnect from │ │ │ │ │ ┌───────┴────────────────┐ │ │ │ one stage to │ │ │ │ └──┤SDAT Vcc LD├───────┘ │ │Another. 165's are│ │ │ │ │ │ │ │ seperated into 2 │ │ │ │ ┌─┤CE CLK├─────────┘ │ stages, 6595's │ ~ ~ ~(One bus for all stages) │ │ (74HC165.1) │ │are all connected │ │ │ │ ┣─┤Vss SOut├── │to the same data │ │ │ │ │ │ │ └──────bus.────────┘ │ │ │  │D0 D1 D2 D3 D4 D5 D6 D7 │ │ │ │ GND└─┬──┬──┬──┬──┬──┬──┬──┬─┘ │ │ │ +5.0Vdc │ │ │ │ │ │ │ │ │ │ │  │ │ │ │ │ │ │ │ │ │ │ │(10kΩx8) │ │ │ │ │ │ │ │ │ │ │ ┣───────┼──┼──┼──┼──┼──┼──┼──┫ │ │ │ ┣───────┼──┼──┼──┼──┼──┼──┫ │ │ │ │ ┣───────┼──┼──┼──┼──┼──┫ │ │ │ │ │ +5.0Vdc ┣───────┼──┼──┼──┼──┫ │ │ │ │ │ │  ┣───────┼──┼──┼──┫ │ │ │ │ │ │ │ ┣───┐ ┣───────┼──┼──┫ │ │ │ │ │ │ │ │ ┌─────────┴───┴───────────┐ ┣───────┼──┫ │ │ │ │ │ │ │ │ │ │ Vcc  │ └───────┫ │ │ │ │ │ │ │ │ │ └─┤SDAT SRCLR │ │ │ │ │ │ │ │ │ │ │ │ │(470Ω x8) │ │ │ │ │ │ │ │ TP (TPIC6595_SCK) ──┼─┻───┤RCK D0├─────────┻──┼──┼──┼──┼──┼──┼──┼─┬57┐ │ │ (TPIC6595.8) D1├────────────┻──┼──┼──┼──┼──┼──┼─┤58│ (TPIC6595_SRCK) ──┻─────┤SRCK D2├───────────────┻──┼──┼──┼──┼──┼─┤59│ │ D3├──────────────────┻──┼──┼──┼──┼─┤60│ │ D4├─────────────────────┻──┼──┼──┼─┤61│ ─┤SOut D5├────────────────────────┻──┼──┼─┤62│ │ _ D6├───────────────────────────┻──┼─┤63│ │ PGND(x4) LGND G D7├──────────────────────────────┻─┴64┘ └────────┬───────┬───┬────┘ ┣───────┻───┘  GNDThen you can have as many GPIO's as you need. This works very well for what I implemented it for. (TP's are the GPIO's you are after)
The thing is that a microprocessor like Z80 or 6502 etc is nothing like a Propeller even with the similar 40 pin DIP package.
A microprocessor is only a CPU. RAM, ROM and peripherals are on other devices. In order to connect the CPU to the memory and peripherals they had a memory bus. The Z80 for example had 16 pins used for sending out memory addresses, the address bus, then it had 8 pins to write or read data through, the data bus. Then there were a few other pins used for bus control and timing, a read/write signal for example.
The general idea being that the address lines are driven with the required memory or I/O device address. External hardware the enables the RAM or ROM or whatever peripheral. The read/write signals selected data in or out of the memory/peripheral. In this way many external devices, UARTS, floppy disk controllers, video etc etc could be connected to the microprocessor.
All of this bus activity was managed by hardware within the microprocessor and so it was fast.
By contrast a Propeller is a micro-controller, MCU's are self contained with CPU, RAM, ROM and peripherals all on chip. All those general purpose I/O pins are no longer driven my dedicated bus hardware but rather by your software. If you read the threads about adding external RAM/ROM to the Prop you will see that a lot of work has been done on this but it will always be much slower than a proper memory bus.
There are pins on the propeller that are just really clever with what they do - eg driving a VGA display, a keyboard, an SD card etc. So I guess you put all those things in the design and see how many pins are left for the bus. averagejoe and I are exploring a two propeller design with 9 pins devoted to the bus. It is a compromise for speed and number of pins.
Of course, latches and SPI and I2C chips can all be used to expand the number of pins.
What are your design goals?
Ever since I read assembly step by step with linux and dos this has been my goal! In that book there is a good chapter where he describes computer architecture and memory buses. He talks about this kit computer he made in the 70s your most likely familar with, the cosmac elf. And I always thought jeez what better way to become a guru programmer than build your own hardware, understand it, and get a small and functional OS running. Right now im working on doing a set of tutorials about connecting hardware to the prop and writing drivers for it. I figured id do a seven segment, a real time clock and some storage, and bring it all togather in the end to build an advanced alarm clock!
Then it hit me, this project could grow into a mini computer very easily. The hardest part would be designing a bus and and an ATA controller. Ive seen alot of stuff on the net like this http://www.cosam.org/projects/z80/index.html this is just an awesome z80 homebrew with ata and all! The problem is you have to be really good and have a lot of knowlege to build something like this and none of these homebrew system have very many details/documentation. I want to build a mini computer with modern chips along in a bunch of smaller steps, this way anyone interested in building a computer can look at my tutorials and maybe get it done.
The reason I like the prop so much is because its simple and efficient! There are no interrupts, a20 gates, segmented memory models! I think learning assembly language on a propeller and interfacing it to hardware is the simplest route to learn and teach computer architecture. I would like to somehow implement at least 1MB of ram, ATA support, and expansion slots, along with the usual HID stuff. Now ive talked to Jazzed and Daune in the past about alot of ram ideas and I know how hard it is to get ram working with the prop and reasonably speedy. My idea is to interface the ram to some other chip that can handel it then feed it to a propeller, im not sure what chip but i know there are memmory controller chips out there. As for the rest of this stuff I have no idea how to get all these pins for it and still retain a decent bus speed for say ATA or maybe hi speed ADC expansion card... Im willing to branch beyond the prop maybe use a z80 to controll the bus??? But for simplicity and education i want to stick to through hole as much as possible and I would like the prop to be the main brain just with really slick interfacing to something to controll bus lines and ATA controllers. After reading this im thinking maybe I could use the z8o to controll the ram as I said before and an ata controller, and expansion cards. But then im still going back to old tech wich isnt as simple as I would like it to be.
This is all academic im not saying im gonna build it next week or if its even possible, but if anyone has some ideas now knowing my goals and that im trying to keep this as simple and pratical as possible so you dont need an ee degree to get it done, id love to hear them. It would be great if it could all be through hole wire wrapped or perfboarded also so anyone really can build it!
SPI is simple, and vanilla mode is 1 bit.
There are QuadSPI and even QuadSPI -DDR standards (DDR uses both clock edges)
Then, the standard intel bus, uses /RD /WR ALE DB7..DB0
This can be easily expanded, as is done in some game cartridges, with a Multiple ALE burst.
Again, you can DDR this if you want.
For the slave a second prop is an obvious choice, but Props do not slave quickly, well.
A CPLD would place no speed caveats on the master, but be less intelligent as an IO.
To give the most speed tolerance, an ACK hardware handshake system would help Auto-pace the IO, so an intel bus, DDR'd and with an ACK line would likely give the best compromise in pin-cost and speed.
Well back in the olden days there were lots of boards you could plug together in various ways and in the last few years a lot of designs have been dusted off. There is a great hobbyist community here http://n8vem-sbc.pbworks.com/w/page/4200908/FrontPage They even use a propeller for the video card.
But maybe that is a bit big? If you think about the things on an older micro there was a main board, then you had a disk driver board, and an I/O board, and a memory board. So much of that fits in the single chip propeller.
Formats have changed too. Where once you had a 40 pin connector to a hard drive, now you have 4 pins to a SD card. And the address and data bus of a Z80 which was around 30 pins can now be done with a 2 pin I2C bus.
A while back (last year and the year before) there was a bit of a challenge putting an entire Z80 computer into the propeller. Out of that came a number of memory expansion ideas. I built a few designs but I myself consider those designs a little obsolete now.
Two memory ideas though maybe worth looking at. Shameless plug here http://forums.parallax.com/showthread.php?137266-Propeller-GUI-touchscreen-and-full-color-display which is 1 megabyte on a 20 pin bus, and the latest design has an expansion port via a 34 way header.
The other one though that I think has a lot of potential but no board as yet is to take a propeller and pair it with the new SPI sram chips that Microchip have just announced. They are 128 kilobytes and that is enough to fit a decent C program. So you can think about a very simple microcomputer with a prop chip, VGA or TV, sram for the program in C, SD card, keyboard and still leave lots of pins free to drive a few latches and a display for your alarm clock.
There are also techniques to workaround the 32k spin limitation - have an "operating system" program and some icons and then run other programs. This can be done with some reload code Kye wrote, so one program can chain to the next.
In general terms, you may not need external ram and if not, the designs are a lot simpler.
So is the design for an advanced alarm clock? If so, that will need a display, buttons and an I2C real time clock. Should be a fairly straightforward propeller project and may not need too many peripheral chips at all.
http://propeller.wikispaces.com/pPropQ
Doing it the reverse where the Prop is the boss chip is a lot harder since the Prop is a MPU not a MCU like a Z-80 or MC68000. It has no external memory bus and you have to kludge one up. On a MCU all you need are a couple 3-8 decoders and some AND and OR gates.
If you want to a megabyte or more of memory go with a MC68000 as your CPU or a newer Z-80.
ATA, use either the solution found on the coasm website or use a 8255. You won't get much simpler or easier.
One megabyte of ram requires a 20 bit address bus if you are accessing memory in bytes, 19 bits if accessed in words, and 18 bits if accessed in longs. I would suggest a 20 bit address bus and access memory in words (16 bits at a time).
Expansion slots require a bus to connect the boards together and this can be done without too much trouble. ATA is a bit more difficult, and I would substitute an sd card for that. I am not sure what you mean by the usual HID stuff, These computers were command line driven. No wimp (Windows, Icons, Menus, Pointers) interfaces here.
Using a memory controller with the prop would be difficult and would most likely slow it down quite a bit. I would suggest using static or pseudo static ram instead.
Skip the Z80, it would only complicate things and slow down the bus. As for the ATA controller, if you really want to go that route make it a peripheral board in one of the expansion slots. That's how it was done on most of the mini and microcomputers.
Make the propeller and a few support chips the CPU board in your system. The only additional function you should consider adding to the board would be memory.
Not only would this be more in line with how those early systems were built, it would also simplify the design and construction of your system by breaking it down into simpler more manageable chunks. Making it all through hole can also be done.
If you are interested in this approach I can post a basic block diagram when time permits.
@DrAcula, by no means is this an advanced alarm clock. I mean i wanted to take the first steps to learn and teach in the form of an alarm clock. You write some ASM drivers for a real time clock ds1302 in my case (plan to use the built in sram on ds1302 to store alarm settings), next connect and write drivers for a 4x7 segment panel, interface sd for alarm tones, add sound dac and opamp ds1808 variable digital pot, maybe even 8 leds for a fun binary clock, oh and some buttons
As far as common HID stuff, I just meant keyboard, video, sound, maybe mouse and a serial port, sorry about not being a little more clear.
Like I said I really want the prop to be the brain of the computer for its simple architecture its easy to learn assembly, it really is a nice chip, maybe even two props with a 16 pin link to give it a little oomph. As far as ram I understand the best way to do it is with serial ram specifically the microchip ones I have a few laying around. Jazzed showed me some drhystone marks and wiring sram in parallel is the fastest solution alot faster than anything else actually. The problem is may need more than 1mb of ram when I think about it, one of my goals is to port gcc to this computer running a tiny posix system, obviously not all of the famous stallmans gcc but just enough to make propgcc work on the computer itself. My choice in ATA goes back to this being academic, ya were all using sata now but im sure to alot of people wanting to understand computers better ATA would be alot more satisfying than spi SD. That way someone could take that knowlege of the ata driver away from the project and understand what the steps are for writing a hardisk driver on the pc. The expansion bus would be icing on the cake, if this project ever got any love people are gonna wanna make expnsion cards to do things i probably dont care about maybe an ftdi vinacular II usb host expansion or something... if this dream comes two life id love to see someone add a parallel card and get an old dot matrix printer running ya know
So heres the jist of what I want hardware wise
keyboard, vga, sound, 2 serial ports (maybe ftdi chips whatever not important yet), enough ram..??, ATA support, and expansion slots at least 4 of them.
im thinking ethernet, usb, printer, bluetooth, would be popular expansion type stuff im sure people would do stuff id never guess, thats the point I cant build a card for the pc on my desk, so if I wanna build cool computer hardware i need an apple2 or something totally new like this
Software wise
TinyOS hopefully posix compliant, can run scaled down propgcc, display simple graphics hell im thinking with one or 2MB or ram you could get SNES quality games, maybe even a windows 3.1 look-a-like.
I just want the thing to be easy for the hobbyist to build, i would rather not include arcane z80/6502 this defeats simple and practical but educational. I noticed someone had said something about implementing a cpld, now that is alot more friendly to me than a z80. Maybe as far as ram goes there would be some way to use a little cpld to quickly relay ram contents to the propeller? Im thinking since the prop is 32 bit id like a way to quickly feed it 32bits of ram data at a time... but I just cant imagine how that would ever work. I mean using a cpld or other chip to collect 32bits at a time from the ram then connecting to 4 pins on the prop to the cpld or whatever and sending a stream of 8bits over the 4 prop connections in parallel is about the only way i can see to save pins but seems slooww or maybe not? sorry if that didnt make sense lol.. I have some other concerns about video and stuff but ill shut up for now
For the computer hardware you have the choice of a currently available microprocessor chip or the propeller using LMM or Emulation. As far as hardware complexity goes it's a bit of a tossup. The propeller needs additional chips to produce an external address and data bus, but has built in serial, video, keyboard, and mouse capability. Here are the requirements you listed and how the prop could deal with them.
Keyboard, VGA, 2 serial ports:
A second propeller similar in function to the protoboard could handle all of these functions using objects in the OBEX. The VGA would have limited resolution and color depth due to the limitations of hub ram so it might be better to use an expansion board for that.
Enough ram:
With 4 '574 latches you could have a 24 bits of address for up to 16 meg words (32MBytes) of memory and an 8 bits to control the bus. The data bus buffering and direction control could be done with 2 '245's
Expansion slots at least 4 of them.
The '574 can drive 15 LS-TTL loads so you can have more than enough expansion slots
ATA support:
From a hardware perspective ATA is a simple parallel interface for data and control signals between the hard drive and the computer. As rod1963 posted an 8255 could be used. The hard part will be writing a driver. My other concern is the availability of parallel ATA drives.
Sound:
The prop is already capable of producing sound, so that is no problem.
parallel printer:
Not a problem. I have already had an old Okidata 182 printing ascii text using a '244 buffer and another using a '595. Parallel ports are simple to build.
1) They're expensive.
2) Unless you're running a large OS like Linux or Windows, they don't make much sense.
Flash disk storage options are much more practical for the Prop or any other micro-controller for that matter.
I havent even been at electronics for 6 months yet, maybe just at it. Anyways this probably sounds stupid but could you help me to understand the concept of latching! Ive read into it and it seems kind of like inverting and or'ing pins or something (im sorry if thats completely wrong). In some of the cases i see it used its to trip a circuit and make it stay on or something and when used in those contexts I understand why its usefull and I guess how it works (unless im worng above lol) but I also see latching reffered to alot when expanding pins and Im not really sure how it relates or how it will help me in this situation, what makes it faster than a shift register...
Im sorry if this sounds totally stupid when im wanting to build a micro from scratch, but like I said its all early, just trying to get a grip on what technologies i need to use and learn about!! Im really new to hardware in reality, i mean i was doing logic voltage translation the other day and kept seeing all these level shifter chips and wondered why I couldn't just connect a diode to a pull up so I went searching and found out thats exactly a method Chris Savage uses in one of his articles on savage circuits, I was pretty excited Id thought that up all on my own before I found that article
Flip-flops, or latches, are the basis of many chips. Some common ones to check out are 74hc174 and 74hc373. The data-sheets can be particularity useful.
Go, Read, Learn Build!!!!
I'd make that book and lots of binary math and bit manipulation the first several weeks of my CS101 class, if I were King! (weed out the weak and infirm!)
Like I sai what inspired me is Assembly language for dos and linux step by step, think its called recently just changed only to linux. This is also a great book the first 9 chapters dont show a single opcode!! He basically goes over computer math and what ram and cpu's acually do and how the cpu addresses the ram and a bit on how ram is acually made. I read this maybe 6 years ago and was programming in VB and C at the time, but was intrested in writing a boot loader so i wanted to learn assembly and I basically picked this book up becuase there werent/arent that many modern x86asm books. God this book just opend my eyes I finally understood the magic off how that printf(); function or if statement worked at a low level. It sounds like code will do the same thing except maybe put it in an even lower perspective maybe give me a good idea of how all these pieces of boolean logic chips intertwine to do what they do?