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base 3 computer issues? — Parallax Forums

base 3 computer issues?

BitsBits Posts: 414
edited 2012-08-13 08:47 in General Discussion
I keep having a dream and in this dream I make a 3 base computer. This something I need to explore so here goes...

Logic gates in base 3 sounds easy enough.
Do they make a base 3 computer? Ill Google it while you read this.
Would the speeds be impressive or what and matrix coding so fun.

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
3base computer digital birth record begins now...

Comments

  • Dr_AculaDr_Acula Posts: 5,484
    edited 2012-07-26 22:27
    You dream in base 3? [Tongue planted firmly in cheek] How strange. I suspect most people here dream in binary or hexadecimal :)
  • jmgjmg Posts: 15,183
    edited 2012-07-26 23:11
    Bits wrote: »
    Do they make a base 3 computer?

    Not at the CPU level, but most uC pins can be considered to be 'Base-3' like, with H.L.Z easily covered.

    Some flash memories also have Multi-bit cells, some do this by flipping the fet, and reading a charge bubble at opposite ends of along gate line, and some vary the charge, and use a Flash ADC readout.

    As you can guess, none of this gymnastics favours raw speed, and is done to pack more into a finite space, so suits memories more than a CPU.

    There was a single-bit CPU once, (with 16 opcodes), but the next step tended to be to 4 bits, then 8, etc.
  • kwinnkwinn Posts: 8,697
    edited 2012-07-26 23:40
    Two state devices are much simpler to create and manufacture than three (or more) discrete state devices. Currently any potential gain in speed is more than offset by the added complexity. The only exception I can think of would be an analog computer and then only if you consider analog results equivalent to multiple discrete states.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-07-26 23:58
    Ternary (base 3) numbers have the highest integer radix economy. Base e is the highest, but that's irrational. :)

    There are certainly legitimate reasons other than efficiency to consider it. For example, each trit can represent "yes", "no", or "don't care" (i.e. 0, 1, and *).

    -Phil
  • localrogerlocalroger Posts: 3,452
    edited 2012-07-27 06:44
    The phrase you want to google is "ternary computer."

    Wikipedia: http://en.wikipedia.org/wiki/Ternary_computer

    Via that article, the only practical ternary computer ever built was Setun at Moscow State University. Apparently the Russians have traditionally had a bit of interest in base 3 computers.
  • BitsBits Posts: 414
    edited 2012-07-27 06:47
    Phil

    So what you are saying is that the base 3 computer would become more like a woman? Yes, no and maybe...Just kidding.

    Kwinn,
    I was thinking about a computer that was +5,0,-5 volts for a prototype, but better than that would be a construct a quantum computer as in 0,1 and both at the same time = Qbits!
  • ercoerco Posts: 20,259
    edited 2012-07-27 08:15
    Bits wrote: »
    So what you are saying is that the base 3 computer would become more like a woman? Yes, no and maybe...Just kidding.

    I think that would be yes, no, and FINE!
  • Heater.Heater. Posts: 21,230
    edited 2012-07-27 08:31
    A female computer would be no use. What ever input you gave it (her) would be wrong:)
  • mindrobotsmindrobots Posts: 6,506
    edited 2012-07-27 08:44
    This thread is degrading quickly! Can I help??

    To Heater's female computer...the input might be wrong but the output would always be correct!

    Male computers would be YES, NO and YES, DEAR when viewed internally or YOU'RE NOT LISTENING when viewed externally.
  • BitsBits Posts: 414
    edited 2012-07-27 10:33
    LOL so great you guys are.
  • skylightskylight Posts: 1,915
    edited 2012-07-27 10:48
    @Bits If you were a base 3 cpu there would only be three answers yes,Yes,YES :smile:
  • GadgetmanGadgetman Posts: 2,436
    edited 2012-07-28 11:10
    The problem with Ternary or 'higher complexity' computers is voltage levels.

    On a binary 5V computer, it's easy to define "1" as "2.5V or more", and "0" as "below 1.4V" and everything in between as 'illegal'...
    It's generally 'easy' to drive the signal to the correct voltage because the 'target' is so 'broad'.

    On a Ternary computer, you'd need to define a third area in the middle, probably with 'illegal' areas too.
    And then design electronics that manages to drive the output of a pin to the middle voltage and keep it stable, fast.
    There's also the input pins to consider. They also need to have a finer resolution, probably using somesort of comparator network. Messy. And it adds delays in the signal path.

    Internally you have the option of using Ternary levels, or double up the internal traces and use two traces for each logic path. (00 = 0 01=1 10=2)
    Going for ternary will be slower. Going for a conversion back and forth may be faster but eats die area.

    I believe some even tried a decimal machine once, but can't remember specifics.
  • localrogerlocalroger Posts: 3,452
    edited 2012-08-10 17:26
    Gadgetman, in the balanced ternary design used by Setun, the valid values are -V, 0, and +V. It's not intrinsically much more complicated than binary.
  • SRLMSRLM Posts: 5,045
    edited 2012-08-10 17:35
    Gadgetman wrote: »
    I believe some even tried a decimal machine once, but can't remember specifics.

    On a similar note, BCD computers are used in finance where binary (or other non-base-10 representations) are inappropriate for the numbers used.
  • rod1963rod1963 Posts: 752
    edited 2012-08-10 18:25
    Go back to Analog computers, that what the DoD used as targeting computers at their Nike Missile sites way back in the day.

    A long time ago Intel released a analog Neural net chip never got traction, way before it's time like Fuzzy logic. Both could be replicated in FPGA's today.
  • GadgetmanGadgetman Posts: 2,436
    edited 2012-08-11 00:47
    localroger wrote: »
    Gadgetman, in the balanced ternary design used by Setun, the valid values are -V, 0, and +V. It's not intrinsically much more complicated than binary.

    Well, the balanced design remove alot of the uncertainities about voltagelevels,but...
    It would mean a much more elaborate power supply, and I guess it would make the chip innards a bitweird, too.

    BCD systems are EVIL!
    (It's a misconception that the 'D' stands for 'Decimal'. In reality, BCD means 'Binary Coded Destruction' as the whole point is to destroy the understandng of Binary math.)
  • kwinnkwinn Posts: 8,697
    edited 2012-08-11 11:50
    @Gadgetman.

    Ternary would require more complex gates, but not necessarily as complex as comparators. NPN/PNP transistors could be used in a form of emitter coupled logic to provide gates with ternary inputs and outputs. The emitter-base voltage of the transistors would provide the natural voltage limits. Same idea would work for fets if diodes were used between logic gates.

    Some of the early microcontroller chips had BCD oriented instructions. I think the 8080/Z80 and 6800 did, but I am not sure. Never had any use for BCD or EBCDIC.

    @SLRM

    Some BCD computers were used in finance at one time but if there are any in use now they are very rare exceptions. Most financial calculations are done in fixed point integer on PC's or mainframes. Not sure how spreadsheets handle them but I suspect if the cells are formatted as currency they are also using fixed point integer.

    @Bits

    I can see how ternary gates could be built using available parts so it would be possible to build or simulate a ternary computer . What would the truth table look like for the basic AND, OR, XOR, and NOT gates ?
  • Clock LoopClock Loop Posts: 2,069
    edited 2012-08-11 13:47
    You sure its a dream?

    rgb.jpg


    Base 3 = R G B

    The terminology for the base 3 optical computer will need to be created, you wanna take that one, bits?, being you have the dreams and all.

    Its all about the bits.
    rgb.jpg
    1024 x 1024 - 41K
    rgb.jpg 41.1K
  • Mark_TMark_T Posts: 1,981
    edited 2012-08-12 05:38
    So one issue with 3 voltage levels is that one by necessity has to lie between the other two - a transition between those two must cross the middle one even though that value is not intended - this means that a lot more care has to be taken to prevent false triggering of the middle level - anything that slows down transitions (stray capacitance, high fanout etc) will risk false triggers - in practice this means having to run slow.

    But I was wondering - there are encoding schemes where 3 values of equal status are possible (3 wires per signal, obviously) and I thought of using phase of a carrier as the logic level. With 0, 120 and 240 degree phases it is possible to switch between any two without crossing the third (so long as you shift the phase in the right direction). With such a scheme a delay element can be a gate (rotating the 3 values)!

    It all sounds a bit fanciful and arcane till you realize this can work in the optical domain with lasers!
  • kwinnkwinn Posts: 8,697
    edited 2012-08-12 08:53
    The issue of reading false data is present in current 2 level systems. That is why we have clocks and signals like vma (valid memory address), etc. A 3 state system could have a clock signal for timing.

    You could use 2 bits of data and 2 signal wires to encode 3 states. Of course that could have 4 states so one state would have to be considered illegal. This is probably the simplest way to build ternary systems with current technology, but the technology is not really well suited to true ternary systems. Perhaps when optical computing becomes a reality ternary computing will be more practical. At present it seems to be a bit like fitting a square peg in a round hole.
  • localrogerlocalroger Posts: 3,452
    edited 2012-08-12 17:26
    When the Russians built Setun most computers were still hand-built out of discrete components, so using a technology as divergent as balanced base 3 was practical, and by all published accounts the result was simpler, more power efficient, and faster than similar designs using binary math. Obviously today we have binary designs of such high refinement that, even if those ternary advantages could be expressed on chips made with modern technology, there would be a huge amount of catch-up to do to apply modern design principles like caches to the ternary CPU, and every single I/O channel would either have to be part of the reimagination or converted to binary. That's a bit of an uphill battle.
  • kwinnkwinn Posts: 8,697
    edited 2012-08-13 00:18
    localroger wrote: »
    When the Russians built Setun most computers were still hand-built out of discrete components, so using a technology as divergent as balanced base 3 was practical, and by all published accounts the result was simpler, more power efficient, and faster than similar designs using binary math. Obviously today we have binary designs of such high refinement that, even if those ternary advantages could be expressed on chips made with modern technology, there would be a huge amount of catch-up to do to apply modern design principles like caches to the ternary CPU, and every single I/O channel would either have to be part of the reimagination or converted to binary. That's a bit of an uphill battle.

    Funny that you mention discrete components. That or emulation is what I was thinking of suggesting to Bits if she decided to pursue ternary computing. The first computer I worked on (Collins 8400) was built using discrete components on boards approximately 4 x 4 inches. It required 3 or more boards for each bit of a register so the computer required a lot of space and power.With today's smd components both size and power requirements would be much smaller.
  • prof_brainoprof_braino Posts: 4,313
    edited 2012-08-13 06:52
    Mark_T wrote: »
    ... and I thought of using phase of a carrier as the logic level. With 0, 120 and 240 degree phases it is possible to switch between any two without crossing the third (so long as you shift the phase in the right direction). With such a scheme a delay element can be a gate (rotating the 3 values)!

    It all sounds a bit fanciful and arcane till you realize this can work in the optical domain with lasers!

    I met a guy that was doing research on this in the late eighties. I haven't seen him since, but he should be done by now :)

    Bits is building this by hand, I guess we'll all have to build our own.

    If bits can set up the logic gates, and we can set up the communications using phased carrier, what other functions need to be implemented?

    Do we have to use lasers? It think it could be simpler to implement a proof of concept with electronic signals, before getting fancy.
  • Mark_TMark_T Posts: 1,981
    edited 2012-08-13 08:18
    No, lasers are not a requirement!

    Perhaps 3-way current-steering logic would be appropriate - think of ECL as 2-way current-steering, so its a generalization using 3 wires for each signal.

    And what kind of gates are useful anyway? Obviously you'd want to build add/sub/compare but would you treat the 3 values as true/false/unknown for conditionals? Or false/true/true?
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2012-08-13 08:47
    It might be an interesting exercise to define Boolean functions for three-state logic. In the case of 1,0, and * (yes, no, and "meh!"), you could follow the simple rule that it follows normal two-state logic, but when one of the inputs is *, the other simply passes through, getting inverted if the function calls for it. So:
    /0 = 1
    /1 = 0
    /* = *

    0 & * = 0
    1 & * = 1

    0 | * = 0
    1 | * = 1

    We already use three-state logic to some extent, where * could represent a floating state. In that case, the rules might be different, where a * input on AND when the other input is 1 entails either a * output or a randomly value.

    Still another interpretation is to treat * as 0.5 and use fuzzy-logic rules for the combinators, rounding the outputs to the nearest 0, 0.5, or 1.

    -Phil
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