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Bifferboard and R861x mmu?? Wow — Parallax Forums

Bifferboard and R861x mmu?? Wow

rwgast_logicdesignrwgast_logicdesign Posts: 1,464
edited 2012-07-19 16:22 in General Discussion
Has any one ever seen the bifferboard? This thing is pretty neat Im wondering how the uC on it isnt in more wide spread use?? The actual dev board is kinda of under powered which is why Im not going to buy one anytime soon. But the specs on its micro are nuts

150mhz intel x86 compatible ASM set
ethernet
3x pci devices
usb
dram support

If someone made a board with a pci slot id be all over this thing here is some more info https://sites.google.com/site/bifferboard/. Just wondering if any one else has seen this chip, maybe ill turn someone on to it that is capable of making a board with pci!! One thing im unclear on is how is it usin the x86 chipset when its a risc chip?

Comments

  • Heater.Heater. Posts: 21,230
    edited 2012-07-18 19:38
    Who said anything about RISC? It's a 486 compatible processor.
    It's kind of neat but now we have the Raspberry PI which has more of everything and half the price. All be it somewhat bigger.
  • rwgast_logicdesignrwgast_logicdesign Posts: 1,464
    edited 2012-07-18 20:26
    im having a hard time finding the rdc page again for this exact chip but check out the cover of the data sheet http://www.sima.com.tw/download/R8610_D06_20051003.pdf ive seen risc in many places. And ya the pi is cool if i can ever get one.... ive been trying since 12am funerary whatever day the launch was. But this is different i mean it has pci its i86 compatible. I think this could be used to intergrate with alot of existing common pc hardware and teach one exactly how to build pci devices in a simpler enviroment than a pc. I do however think the bifferboard is junk and overpriced, someone needs to break out the the pci slots on a better dev board.

    Just found this http://www.rdc.com.tw/en/product/mcu_32bit.php list 3pci/lp 2USB 2uart.
  • kwinnkwinn Posts: 8,697
    edited 2012-07-18 23:48
    Regardless of what the data sheet calls it this is definitely NOT a RISC chip. RISC is an acronym for "Reduced Instruction Set Computer" and the x86 instruction set is not in any way reduced. The other hallmark of RISC was that it executed the majority of instructions in a single cycle, which this chip does not do.
  • rwgast_logicdesignrwgast_logicdesign Posts: 1,464
    edited 2012-07-19 01:42
    Well im not sure why they would lie about being RISC, how would that benefit them? Any person who works with micros and cpus should know what RISC is and im sure this whole i486/RISC thing is confusing to anyone who doesnt think there straight out lying. Im wondering if its possible that maybe there running i486 instructions on some kind of a risc chip at heart. Maybe theres an intrepreter taking the menmonics and converting them to the rightful risc instructions and they went through this effort to get intel compatability?? Is that even possibe??

    I mean if you think about this thing it has awesome potential. At least the speed of a 486dx100 and then some to spare, an interface to pc100 ram. I think 100mhz ram and a 150mhz cpu is going to be super zippy for anything you would do normally on a micro hell this is enough HP to run windows98 then some! but the killer app as i see it is the PCI, i mean think about it.... say out of the blue you think routing dial up data over your lan would be beneficial, well walk to your junk pile in the garage and scrap a modem and 10/100 ethernet pci card! Alot of hardware has drivers written for linux! Even if your running a homebrew os you can use those drivers to figure out how your pci hardware needs to communicate. I mean **** maybe you could slap 128mb pc100ram and a pci video card get win9x running!!

    I just seriously was hoping someone had heard of this micro and would chime in and say ya theres a board out there with dram and pci sockets!! The code portability and hardware compatability of this thing is insane this would allow pc programmers to not learn a new architecture and build embedded stuff that would give arm ucontrollers a run for there money(uControllers not armv7 neon cpus ok lol)! Just seems to good to be true really :/
  • Heater.Heater. Posts: 21,230
    edited 2012-07-19 03:37
    Not sure they would call it "lying", rather "marketing". The definitions of RISC/CISC are very woolly no a days and it is claimed that recent x86 chips translate x86 CISC instructions to RISC internally. Who cares? The instruction set you see is CISC and horrible.

    This chip seems neat for running old legacy binaries on DOS or such but not much use modern world of ARM boards, Linux, and bucket loads of open source software with which you can build cheaper faster more flexible systems. Having the x86 instruction set is not a bonus in the opensource world where you are not tied to binaries.
    The code portability and hardware compatability of this thing is insane<br>
    Not sure what you mean. If you have source code to compile it's probably about as portable as anything else. If you only have DOS executables then the portability is insanely bad.
    ...this would allow pc programmers to not learn a new architecture...
    When working with 68K x86, ARM, PPC and other embedded systems, I have often not had to learn much about the CPU architecture. The code I write in C does not require such deep knowledge, unless there is a specific need, and is portable to many arches.
    .and build embedded stuff that would give arm ucontrollers a run for there money
    Not this chip.
  • CircuitsoftCircuitsoft Posts: 1,166
    edited 2012-07-19 07:35
    I suppose the RISC designation probably refers to the cpu core. The amd k6 is an am29k core with an x86 instruction decoder on the front of it.

    As for speed, most processors these days have a BogoMIPS to clock frequency ratio of 2. To have BogoMIPS lower than the clock, especially 3x lower, is amazingly slow. Even the venerable Via C3 is significantly faster than that.
  • Heater.Heater. Posts: 21,230
    edited 2012-07-19 07:51
    Circuitsoft,
    ...most processors these days have a BogoMIPS to clock frequency ratio of 2

    I know what you are getting at but you should take bogmips with a pinch of salt:.

    From my new toy, a Raspberry Pi, running at the default clock frequency of 700MHz: 
    $ cat /proc/cpuinfo
Processor       : ARMv6-compatible processor rev 7 (v6l)
BogoMIPS        : 697.95

    From my desktop x86 PC: 
    $ cat /proc/cpuinfo
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 23
model name      : Intel(R) Core(TM)2 Quad CPU    Q8400  @ 2.66GHz
stepping        : 10
cpu MHz         : 2003.000
bogomips        : 5351.43
  • CircuitsoftCircuitsoft Posts: 1,166
    edited 2012-07-19 16:22
    Heater. wrote: »
    Circuitsoft,

    I know what you are getting at but you should take bogmips with a pinch of salt:.

    From my new toy, a Raspberry Pi, running at the default clock frequency of 700MHz: 
    $ cat /proc/cpuinfo
Processor       : ARMv6-compatible processor rev 7 (v6l)
BogoMIPS        : 697.95
    The ARM11 does not have a multi-issue pipeline. Cortex-A does. Still, you have basically BogoMIPS = MHz.
    Heater. wrote: »
    From my desktop x86 PC: 
    $ cat /proc/cpuinfo
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 23
model name      : Intel(R) Core(TM)2 Quad CPU    Q8400  @ 2.66GHz
stepping        : 10
cpu MHz         : 2003.000
bogomips        : 5351.43
    Given that the Core2 is based on the P6 architecture, but with the branch prediction logic from the Pentium 4, the pipeline is extremely efficient, which is why you get more than 2-issue per clock out of it.

    See BogoMIPS on Wikipedia
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