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Initial experience with Mac OS version — Parallax Forums

Initial experience with Mac OS version

Mike GreenMike Green Posts: 23,101
edited 2012-06-21 11:09 in Propeller 1
Installation under Lion 10.7.4 went as simply and smoothly as it seemed from the description. I've tried some simple "Hello World" class programs and they work as hoped. I'm now doing something more complex (converting the RaysLogic flash/sram board test program) and so far it's going ok. More as I learn / discover more.

Comments

  • David BetzDavid Betz Posts: 14,516
    edited 2012-06-21 04:36
    Mike Green wrote: »
    Installation under Lion 10.7.4 went as simply and smoothly as it seemed from the description. I've tried some simple "Hello World" class programs and they work as hoped. I'm now doing something more complex (converting the RaysLogic flash/sram board test program) and so far it's going ok. More as I learn / discover more.
    Hi Mike,

    We have an XMMC cache driver that will work with Ray's Flash Point SuperQuad module. It's called sst_sqi_flash_cache.dat and it works with the board configuration file sst.cfg that you will have to edit to indicate how you've connected your SuperQuad module to your Propeller pins. I also have one of the RamPage modules but I haven't had time to write a cache driver that will work with the SPI SRAM chips on it.
  • Mike GreenMike Green Posts: 23,101
    edited 2012-06-21 09:07
    Thanks for the info. I have my module mounted to a C3 which already has SRAM and Flash built-in and I'm trying to use the SPI select counter mechanism of the C3, so I need to modify the test program anyway. I'll have to look at how the various C3 drivers manage the select counter since that's necessary for all of the SPI devices.
  • David BetzDavid Betz Posts: 14,516
    edited 2012-06-21 09:32
    Mike Green wrote: »
    Thanks for the info. I have my module mounted to a C3 which already has SRAM and Flash built-in and I'm trying to use the SPI select counter mechanism of the C3, so I need to modify the test program anyway. I'll have to look at how the various C3 drivers manage the select counter since that's necessary for all of the SPI devices.
    The spi_sram_cache.dat driver knows how to work with the C3 address selection mechanism. There is a section in the propeller-load documentation that says how to configure it. However, there is currently no way to use two different cache drivers at the same time so you can either use spi_sram_cache.spin configured for the C3-style SPI CS mechanism or you can use the standard c3.dat or c3f.dat cache drivers that know how to talk to the on-board SPI flash and SRAM.
  • David BetzDavid Betz Posts: 14,516
    edited 2012-06-21 09:34
    David Betz wrote: »
    The spi_sram_cache.dat driver knows how to work with the C3 address selection mechanism. There is a section in the propeller-load documentation that says how to configure it. However, there is currently no way to use two different cache drivers at the same time so you can either use spi_sram_cache.spin configured for the C3-style SPI CS mechanism or you can use the standard c3.dat or c3f.dat cache drivers that know how to talk to the on-board SPI flash and SRAM.
    Ummm... I'm mixing up my threads. Sorry!
    You would be using the sst_sqi_flash_cache.dat driver but the remainder of my comments remain the same. Either it can be used or the standard c3.dat or c3f.dat drivers can be used but not both at the same time.
  • David BetzDavid Betz Posts: 14,516
    edited 2012-06-21 10:54
    Steve pointed out that my posts were probably confusing. If you can describe how you have your module hooked up to the C3 I'll suggest a configuration file that will work with it.

    Thanks,
    David
  • Mike GreenMike Green Posts: 23,101
    edited 2012-06-21 11:01
    Data I/O pins 0-3 are connected to P0-P3. /CS for the SRAM is connected to SP6. /CS for the Flash is connected to SP7. SCK for both SRAM and Flash is connected to SCK for the SPI port.

    I also have a WiFly module connected to P4 (Rx) and P5 (Tx) with the /RST line connected to the Prop's /RST. P6 and P7 are unassigned at present. I do plan on eventually making a specific configuration file for this setup with definitions for these I/O pins, but I want to use the test program to become familiar with PropGCC.
  • David BetzDavid Betz Posts: 14,516
    edited 2012-06-21 11:09
    Mike Green wrote: »
    Data I/O pins 0-3 are connected to P0-P3. /CS for the SRAM is connected to SP6. /CS for the Flash is connected to SP7. SCK for both SRAM and Flash is connected to SCK for the SPI port.
    Try this. It should work with the flash on your module. As I said in an earlier post, I haven't tried writing a driver for the SPI SRAM on Ray's module. I do have one of the RamPage modules so I could work on one if you're interested though. 
        cache-driver: sst_sqi_flash_cache.dat
    cache-size: 8K
    cache-param1: 0x00000b13 # 0xssxxccpp - ss=sio0 xx=unused cc=sck pp=protocol
    cache-param2: 0x19080007 # 0xaabbccdd - aa=clr bb=inc cc=unused dd=addr
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