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Question about GCC code generation — Parallax Forums

Question about GCC code generation

pedwardpedward Posts: 1,642
edited 2012-06-23 09:47 in Propeller 1
I was reviewing the code generated by GCC and I was struck by the complete lack of any conditional execution flags.

I see that GCC does the most simplistic IF_E conditional execution for if-then-else, but I haven't seen any other code that uses it.

Comments

  • ersmithersmith Posts: 6,097
    edited 2012-06-13 04:34
    pedward wrote: »
    I was reviewing the code generated by GCC and I was struck by the complete lack of any conditional execution flags.

    I see that GCC does the most simplistic IF_E conditional execution for if-then-else, but I haven't seen any other code that uses it.

    Could you give us an example of some code that you think should be compiled with conditional execution but isn't?

    Thanks,
    Eric
  • Dave HeinDave Hein Posts: 6,347
    edited 2012-06-13 10:07
    If you compile this with -Os
    int test(int a)
    {
        if (a)
            return 1;
        else
            return 2;
    }
    
    you get this.
    	.text
    	.balign	4
    	.global	_test
    _test
    	cmp	r0, #0 wz
    	IF_E  mov	r0,#2
    	IF_NE mov	r0,#1
    	mov	pc,lr
    
  • pedwardpedward Posts: 1,642
    edited 2012-06-13 11:58
    I don't have specific examples ATM, but if you've seen hand written PASM, you'd be struck by the "long" way of doing things in GCC.

    Dave, I-T-E was specifically exempted, since you can only code it (rationally) with conditional execution. You could use self modifying code, but that would just be masochistic!
  • Brian FairchildBrian Fairchild Posts: 549
    edited 2012-06-22 03:15
    pedward wrote: »
    I was reviewing the code generated by GCC and I was struck by the complete lack of any conditional execution flags.
    Will PropGCC ever support that?

    I've never ported it to another processor but as I understood it, at its core it assumes a standard abstracted processor with a certain number of registers and certain basic instructions. Porting to a new processor is all about mapping those to the real target. Anything cleverer is handled by the optimisation phase and I'm not sure how easy it would be to spot where conditionals could be used. I suspect the amount of looking forwards and backwards over the basic code to see what could be optimised would make it rather tricky. But I might be wrong.
  • ersmithersmith Posts: 6,097
    edited 2012-06-22 05:28
    Will PropGCC ever support that?
    As Dave Hein pointed out, PropGCC already supports conditional execution, and in fact generates it (Dave provided an example).

    Pedward later qualified his question by saying "other than in if/then/else", but I have yet to figure out a case where the compiler should generate a conditional outside of if/then/else (or the C ? : operator, which GCC treats the same as if/then/else). That's not to say there isn't such a case, I'm just not aware of one.

    Eric
  • pedwardpedward Posts: 1,642
    edited 2012-06-22 13:29
    Looking at a few PASM modules, it appears that typically only about 4 different flags are used, and they are used in conjunction with the special tests that many instruction do. There are some cmp or test examples, but most of the others are using the leftovers from instructions like movd, rdlong, etc.

    The compiler would need to be an order of magnitude smarter to properly utilize alternate instructions and conditional execution. I don't know if GCC can do that nearly as well as a programmer.
  • KyeKye Posts: 2,200
    edited 2012-06-23 09:47
    Maybe it can. The propeller ASM architecture allows for a lot more cleverness than in other processor ASM code.

    One would probably need to sit down and think of all the clever ways to write ASM instructions and describe then to GCC in the RTL language it uses.
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