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74hc595 on start up — Parallax Forums

74hc595 on start up

mselafmselaf Posts: 11
edited 2012-05-09 00:46 in General Discussion
hellothe project is cascade 74hc595 SER to PARALLEL ,my project is working fine but my prob on start up power, all data output is low logic that mean relays is close and others data , on init mcu i am CLR data output but the same prob some one to help regards jamalo
595.bmp 88.9K

Comments

  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-04 05:43
    The 74hc595 has an /OE (output enable) pin. If you hold this high, the outputs will float (high impedance) no matter what the shift register holds. The ULN2803 Darlington transistors will remain off if their inputs float, although it would be better to use 10K pullups to Vdd to guarantee this.

    Connect all the /OE signals to an MCU I/O pin and use a pullup (10K is fine) to hold this high as the power comes on. The relays will stay off until your program can initialize all the shift registers, then set the I/O pin for the /OE to low.

    This thread moved to General Discussion. It doesn't belong in the Projects forum.
  • mselafmselaf Posts: 11
    edited 2012-05-04 06:08
    hello
    and how are , i am realy happy for your help thanks very much
    your Idea is very good to control by OE/ also during power lose or cut off by mcu funtions save data and off reayls , but after i wrote my thread here i pull down latch data line on that i solved my prob how about this point , we are waiting your respond
    regards engineer jamalo
    605 x 525 - 14K
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-04 06:37
    Remember that there's also a /MR line (master reset) that should have a pullup.

    The problem with your solution is that the latches can have either state (0 or 1) on power up. Often they're designed to favor one state or another when they're initialized, but the NXP datasheet for the 74HC595 doesn't say if this is the case and, even if it were the case, some other manufacturer may do it differently.

    If your solution works for you, keep it. If you were making a commercial product, I'd say you should use my solution or check with the manufacturer about the initial state of the latches.
  • mselafmselaf Posts: 11
    edited 2012-05-04 06:56
    hello
    yes i did that with MR/ also that very good , we are making robust sys product its kind of lift board , we have to study robust sys and all Possibles like ESD /EFT PCB ,do you think that scan sys by 74hc595 for write data out and 74hc165 for read data are convince and robust , or do you have other Idea , i am very sorry for your time ,

    waiting your respond

    regards engineer jamalo

    mselaf@yahoo.com
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-04 07:33
    Using the 74HC595 for outputs and 74HC165 for inputs is a very good way to do I/O expansion. You just have to be careful about initialization. There are lots of other solutions including I/O expander ICs from NXP and others that use either I2C or SPI for the serial I/O protocol. These work well and provide bidirectional I/O pins, but are more expensive and a little more complicated to use.
  • mselafmselaf Posts: 11
    edited 2012-05-04 07:43
    thank you my friend for your cooperation also i am Appreciate
    your respond ,you are Handsome man thanks

    regards engineer jamalo
    email : mselaf@yahoo.com
  • LawsonLawson Posts: 870
    edited 2012-05-04 16:10
    Mike Green wrote: »
    Remember that there's also a /MR line (master reset) that should have a pullup.

    The problem with your solution is that the latches can have either state (0 or 1) on power up. Often they're designed to favor one state or another when they're initialized, but the NXP datasheet for the 74HC595 doesn't say if this is the case and, even if it were the case, some other manufacturer may do it differently.

    If your solution works for you, keep it. If you were making a commercial product, I'd say you should use my solution or check with the manufacturer about the initial state of the latches.


    Fyi, all the shift registers I've tested (74HC164s and 74HC595s from TI) have a power on reset circuit. This circuit arms when Vcc drops below ~1.8v with 74HC series, and triggers when Vcc rises quickly past this threshold. The results of the power on reset are the same as toggling the /MR line.

    Lawson
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-04 17:25
    @Lawson - The /MR line just clears the shift register flip-flops and doesn't affect the latches on the 74HC595 according to the datasheet. It's not at all clear what state the latches come up in on power up.
  • LawsonLawson Posts: 870
    edited 2012-05-04 18:33
    Should've read the '595 data-sheet then, but the output latches always came up as low in my tests. Kind'a stupid they don't mention this in the data-sheet. Maybe this behavior is just assumed from the general 74 logic spec? (or some other EE "secret hand shake"?)

    Lawson
  • whickerwhicker Posts: 749
    edited 2012-05-04 23:39
    Lawson,

    I know your comment was mostly in jest, but there's no secret handshake.
    I don't know how else to state it, but why would the makers of, say, a Static RAM chip list as a bullet point feature:
    * state of each bit is indeterminate on powerup. Some of your previous data from before might be there, but who knows?

    It's basically "don't assume the powerup state of any type of memory device (flip-flop, latch, etc) unless it is specifically defined".
    This goes doubly so for unitialized program variables: sometimes they will be said to be set to 0, but rarely will they say that they aren't set to a specific value.
  • mselafmselaf Posts: 11
    edited 2012-05-05 01:09
    hello every body
    Oh now I am little confused .our project ( mcu :16f877A crystal :20Mh )
    mcu.bmp 88.9K
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-05 06:59
    We're just discussing our opinions and experience about the initial state of the latches in the 74HC595. What are you confused about?
  • mselafmselaf Posts: 11
    edited 2012-05-05 07:35
    nothing
    its just little confused about 74HC595 and 74HC165 are suitable to our project or not that is . i am realy soory for your time
    good luck
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-05 07:51
    Both the 74HC595 and the 74HC165 are cheap and simple to use to expand the I/O capability of microcontrollers. Parallax has lots of examples of their use with the Stamps and many people have used them in their projects. As is true with any microcontroller I/O pin, you have to be aware of the initial state of the I/O pin when you design your devices. You may need pullup or pulldown resistors to establish a known output state for an I/O pin initially in input mode. You may need to do what I suggested earlier to hold a device in a known state until the microcontroller can properly initialize it. In your case, you want the relays to be off initially and to remain off until your program deliberately turns them on.
  • mselafmselaf Posts: 11
    edited 2012-05-05 08:06
    I am going to try a timer (like a 555 timer) to the Reset MR Pin of the 74HC595 and the input of the timer to CLK signal from MCU. If the CLK signal doesn’t change for 1 second the 74HC595s will reset.A Watch Dog just makes sure that the relays controller doesn’t lock up in case of a mcu lock up (i.e. crash)
    i think its suitable
    481 x 284 - 5K
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-05 10:03
    That won't do what you expect. Remember that the /MR signal resets the shift register and not the latches. Read the datasheet for the 74HC595 carefully.
  • frank freedmanfrank freedman Posts: 1,983
    edited 2012-05-05 16:52
    As an alternative, you could also use an additional relay to disable the +24v until the system is fully initialized and then the program enables the +24v after a certain amount of delay, and/or certain system status checks or other criteria are met. If your +24v supply or regulator has an control input, you could use that instead of a relay. Lots of ways to safely do this.

    Good luck,
    FF
  • mselafmselaf Posts: 11
    edited 2012-05-08 06:07
    I have read (74HC595 )datasheet carfully also I have test all possibility of MR AND OE /
    During initialized time mcu can enable and disable data output (595) by control OE bit or any other external hardware also pulldown resistors to establish a known output state for an I/O

    But we are encounter fatal error :

    If mcu is victim by spikes or rest state , that mean we lose connection data scan sys by output data on that MR don’t effects any way but only OE/ is effects on that any external hardware can disable relays output.
    regards engineer jamalo
  • Mike GreenMike Green Posts: 23,101
    edited 2012-05-08 09:11
    You have discovered one of the issues in a good design ... How to ensure that a device powers up in a desired state and how to ensure that a device responds to fault conditions with behavior that's safe and non-destructive. This is not simple. Often it involves disabling some parts and adding some parts (like pullups or pull down resistors) to ensure that the device's behavior is what is desired. In the case of the 74HC595, you have to use /OE because there's no other way to ensure that the I/O pins have a known state on power up. You may want to use a brown-out detector to reset the MCU to ensure that it reacts properly if the power source gets large voltage spikes ... so that it resets and changes all the I/O pins to input mode so that a pullup can hold /OE high
  • mselafmselaf Posts: 11
    edited 2012-05-08 09:57
    yes that is the aim the time rings the bell < robust design >
    res.bmp 88.9K
  • frank freedmanfrank freedman Posts: 1,983
    edited 2012-05-08 12:24
    Generally you will see a circuit known as a watchdog used to monitor an mcu in order to reset the mcu in the event of a program fault. If I understand your concerns above, you are looking to be able to make a system safe in the event of mcu failure. You can use a watchdog circuit to disable the power systems in the event of loss of comms/control functions. Something as simple as a missing pulse detection circuit could be used to check for a "keep alive" which could then disable the power circuit/supply on loss of the signal for longer than a preset amount of time.
  • mselafmselaf Posts: 11
    edited 2012-05-09 00:46
    wow I did that now and I got amazing result

    this code during interrupt scan 10Ms

    //++++++++++++++++++++++++++++++++++++++
    // DISABLE OUT DATA SCAN
    if(!RELAYS_DATA)OE_595 = _595_DISABLE;
    else OE_595 = _595_ENABLE;
    //++++++++++++++++++++++++++++++++++++++
    write_expanded_outputs(data_595);

    regards jamalo
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