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Sharing Multiple ADC Data pins? — Parallax Forums

Sharing Multiple ADC Data pins?

FalconFalcon Posts: 191
edited 2012-01-03 10:46 in BASIC Stamp
My current project uses two ADC0831 chips and one ADC0834. I needed the 0831 chips because the Reference and Offset voltages can be set individually, whereas the 0834 has one "global" Vref pin and is used for four LM34 temp sensors. I am planning to share the Clock pins, but I know the CS pins have to be different for each ADC.

That being said,

1.) Can I use one BS2 pin for all three ADC Data OUT signals?

2.) Can I use one BS2 pin for all three ADC Data IN signals?

My logic makes me think yes since each chip is read sequencially and the DO and DI pins are only in use while that chip's CS pin is LOW. At that same time the CS pins for the other two ADC's are held HIGH to inhibit. I could use a short pause between reading the three ADC chips if necessary.

Thanks,

falcon

Comments

  • FalconFalcon Posts: 191
    edited 2012-01-02 07:11
    Let me expand on my question with more information:

    Each of the following chips will be read sequencially so no two will be actually using a particular pin at that same time.

    2 each ADC0831; each requires the following connections to the BS2:
    CS (Chip Slecet)
    CLK (Clock)
    DO (Data Out)

    The ADC0834 requires the following connections to the BS2:
    CS (Chip Slecet)
    CLK (Clock)
    DO (Data Out)
    DI (Data In)

    I am also using a TLC2543 ADC that required the following connections to the BS2:
    CS (Chip Slecet)
    CLK (Clock)
    SDO (Data Out)
    SDI (Data In)

    And a 74HC165 chip that requires the following connections to the BS2:
    CLK (Clock)
    DO (Data Out)
    LOAD (CS???)

    I will, of course, have to use separate BS2 pins for each CS.

    I will use the same BS2 CLK pin for all five chips.

    Questions:
    Can the two ADC0831s, ADC0834, TLC2543 and 74HC165 share one BS2 pin for the DO/SDO requirements?

    Can the ADC0834 and TLC2543 share one BS2 pin for the DI/SDI requirements?

    The 74HC165's LOAD pin is described in the datasheet as "asynchronous parallel load input (active LOW)". Stampworks V 2.1 page 139 describes the use of the LOAD pin as follows: "To read the data from the 74HC165, the parallel inputs are latched by briefly pulsing the Load line (high-low-high)". This makes me think it is only used to initiate the SHIFTIN command. But, I do not see a CS pin on the 74HC165 so LOAD must perform a similar function and should not be shared.


    I believe I can get away with alotting only 8 pins for these 5 chips. Does anyone see any potential conflicts?

    falcon
  • PaulPaul Posts: 263
    edited 2012-01-03 10:46
    Yes, the 74LS165 does not have a CS- pin. When I used it with the 74LS595 chip, I used the same CLOCK and LOAD lines lines but I had to put a 1K resistor on each data line. This prevented a *short* when the "high" Data output of one tried to connect to the "low" Data input of the other or the Data line from of the stamp.
    Alternately you could make your own CS using a 4502 or 4503 CMOS chip or some other CMOS tristate chip.
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