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Difference in counter DUTY vs NCO waveform? — Parallax Forums

Difference in counter DUTY vs NCO waveform?

lardomlardom Posts: 1,659
edited 2011-12-21 17:33 in Propeller 1
It looks like both counter modes, Duty and NCO, could be used to control voltage and current from a power supply. The last time I tried using Duty to control a 12V source the circuit component got too hot. (I had to solve the heat problem with an 8 ohm ceramic resistor.) I think it was because the transistor operated in its linear region like an audio amplifier. NCO, on the other hand would cause the the transistor to behave as a switch, I think. I don't have a scope to see the difference. I'm guessing that Duty would drive a pin high a given % whereas NCO high time = 50% the difference being in Hz.
In any case would NCO be a good way to reduce voltage? I need power for motors.

Comments

  • tonyp12tonyp12 Posts: 1,951
    edited 2011-12-21 12:41
    nco would create a square wave therefore would always be 50% duty.
    Don't think that would ok for a simple DAC or transistior voltage circuit
    http://youtu.be/tOkHvNjV4e0
  • lardomlardom Posts: 1,659
    edited 2011-12-21 14:33
    Thanks tonyp12. I watched your video several times. I saw the phsa values at bit 31 and 32 and took out my calulator. That made things a little clearer.
    I still can't get my head around what I think are two things going on. It seems the phsa bit pattern rolls over every 32 clocks whereas the maximum binary value takes 53.6 secs.
    At least it appears that duty is what I need for DAC. I'll have to study some more code with a calculator.
  • pedwardpedward Posts: 1,642
    edited 2011-12-21 15:45
    NCO outputs the value of bit 31. Since the counter is 32 bits wide, you are still counting even when bit 31 goes high. That would give you 2^31 bits of counting high and counting low. In DUTY mode the output is the overflow of the counter, when the counter rolls over from FFFF_FFFF to 0000_0000 the output goes high. When the counter is back at zero, the carry bit is cleared. Here is what the App note says, since this behavior isn't documented in the datasheet:

    If FRQA is $0000_0001, the carry bit of PHSA will be 1 only once every 2^32 (4,294,967,296)
    cycles. At an 80MHz system clock, this will occur approximately once every 54 seconds.
    Similarly if FRQA is $FFFF_FFFF, the carry bit of PHSA will be 0 only once every 2^32 cycles.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2011-12-21 16:01
    pedward wrote:
    when the counter rolls over from FFFF_FFFF to 0000_0000 the output goes high. When the counter is back at zero, the carry bit is cleared.
    That may be a little confusing, since that exact behavior occurs only when frqx is 1. The main thing to remember is that, when frqx is added to phsx at every internal clock cycle in DUTY mode, the output pin reflects the instantaneous value of the carry bit after each addition. It's not treated like a persistent "bit 32" but recomputed from scratch upon each addition. Therefore, the higher the value in frqx, the more often a carry will occur and the more often the pin will be high.

    It's important to keep in mind, though, that DUTY mode is no substitute for real PWM when it comes to driving MOSFET gates, for example. This is because some of the pulses from DUTY mode can be as narrow as 12.5 ns (80 MHz clock), which is too short for most MOSFETs to switch all the way on or off. The OBEX contains several PWM objects that overcome the limitations of DUTY-mode for on/off driving apps.

    -Phil
  • lardomlardom Posts: 1,659
    edited 2011-12-21 17:12
    Phil, I think I've got it. After reading your reply I reread the Propeller lab book's explanation of duty mode which says;
    "...carry bit controls an I/O pin's output state."
    In other words if I have a 4 bit phsx register and I set frqx to 75% the carry flag will be set 3 times every 4 clocks.
  • pedwardpedward Posts: 1,642
    edited 2011-12-21 17:33
    That may be a little confusing, since that exact behavior occurs only when frqx is 1. The main thing to remember is that, when frqx is added to phsx at every internal clock cycle in DUTY mode, the output pin reflects the instantaneous value of the carry bit after each addition. It's not treated like a persistent "bit 32" but recomputed from scratch upon each addition. Therefore, the higher the value in frqx, the more often a carry will occur and the more often the pin will be high.

    It's important to keep in mind, though, that DUTY mode is no substitute for real PWM when it comes to driving MOSFET gates, for example. This is because some of the pulses from DUTY mode can be as narrow as 12.5 ns (80 MHz clock), which is too short for most MOSFETs to switch all the way on or off. The OBEX contains several PWM objects that overcome the limitations of DUTY-mode for on/off driving apps.

    -Phil

    Yeah, I know that in my Arduino_light object I do n << 24 to have 256 levels and ensure the minimum period is long enough.
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