Capacitive discharge/RC Constant math help

xanatos

Hello! I am looking at creating a simple RC circuit that will hang on the collector of an optoisolator. The circuit will consist of a single resistor and small-value cap in parallel with the collector/emitter leads of the photoQ. There will be some value of pull-up resistor on the collector of the photoQ (probably 10k). The RC network and the emitter of the photoQ share the ground level. I am looking to calculate the values of R & C here (and assuming an R-load of several megohms) such that it will give me a "basically" ripple-free DC signal output (within 10% or so ripple... just enough to guarantee a uC can read it reliably as a 1) with a square-wave-ish input with a duty cycle of say - 40%, but will allow the level to drop to 0 within a few cycle-times when the signal is removed from the input to the optoisolator.

I have always been great at just "shooting from the hip" and picking values that do what I want them to do and getting it right within a reasonable range, but I'd love to actually learn some more precise methods of doing this.

Given the following values:

Vcc: 5.0vdc
Rc: 10k
Rload: 10M
Signal Freq: 60Hz
Signal Waveform: Square
Signal %DC: 40%

How would I calculate the value of R for a given value of C (or vice-versa)? For the example, let's say I have a .1uF cap as C.

The math would have to take into account all of the above parameters such that I would be able to adjust for a change in %DC, or Freq, etc.

I am looking to create the following type of output based on the input to the RC network:

Input to network:
--_--_--_--_--_--_--_--_--_--_--_--__________________________

Output From Network:

---

\__________________________

Within reason of course (and in case your font isn't monospacing, that sloping slash line occurs when the pulse train drops out in the "input" waveform).

Thanks for your pointers here. I remember that I got some of this stuff aeons ago in college, but I never really needed to use it (I hated math back then - now I love it!)

Best,

Dave

LoopyByteloose

Well, there are really two sides to the use of RC circuits. The foremost is for timing as a predictable form of decay. And then there is the more generalized use of in filtering. Are you trying to do both at the same time?

You might ponder I=C dV/dt or as you are thinking RxC=time where R is in Ohms, C is in Farads, and t (of half-life) is in seconds.

If you desire filtering, it really isn't a 'formal RC decay circuit'. It is a filter application using capacitance to remove ripple and the resistance is mostly what in inherent in the circuit.

The basic theory is that you never really get rid of ripple entirely, you just drop it to an acceptable level. With a tiny megaohm load, I suspect a 1uf or 10uf capacitor would be very adequate for something that is 5VDC output, but that would slow down your pulse response - possibly too much. The rule of thumb is the the bigger the capacitor, the less ripple.

But, you may even find that you want a LC circuit to optimize filtering ripple rather than an RC.

Much depends on how much load you have and how unchanging your ripple frequency remains. Here you seem to want to remove a 60 cycle ripple and most discussion of 60 cycle ripple reduction is based around audio amp power stages (which have huge loads).

The bottom line is that the more ripple filtering you have, the slower your response will be. So the rate of your pulse train will become limited by the size of your ripple capacitor. What can you live with? If it is faster than 1/30th a second response, you may have design problems.

LoopyByteloose

http://en.wikipedia.org/wiki/Ripple_%28electrical%29

The Wikipedia article on Ripple might be more to the point than investigating an audiophile point of view about power supplies.

The central problem is that you want to keep the voltage high enough to keep the logic sensing voltage, but when the voltage shuts down, you don't want to add an unnecessary delay to the shut-down timing.

The Ripple formula applies to the first situation and
RC decay formula applies to the second situation.

Together, they might allow you to optimize the capacitor size. Actually, the two points of view are somewhat opposing. The first is about dropping below a threshold and the second is about keeping above a threshold.

xanatos

I am indeed trying to do both. I've never had a problem quashing ripple, but now I need (well, I'd like) to do it as a balance between my usual approach (fat caps, preferably enough to stop just short of popping a rectifier with power-on inrush current to the caps!) and in this case, having just enough to keep the level reliably above a logic 1 level, and having it drop right out within 2 or 3 cycle-times for the given frequency. My normal ripple-filter approaches yield unnecessarily long fall-offs. In testing, I have come pretty close to finding some decent values, but what I'm really looking for is the math to do this. dV/dT stuff. Probably with a completely unnecessary degree of precision... but it really is the math I seek. Functionally, I already have the circuit working... So the wiki article and formulas may yield the info I need to combine two viewpoints and create the formula I need!

Update: So far, the most useful part of Wikipedia for my inquiry is this page on RC Timing: http://en.wikipedia.org/wiki/RC_time_constant

A quick additional question is: Given that the approximate RISE TIMES for an RC circuit are ~ 1.4t (where t = RC, and you are calculating for a 20% charge to the 80% charge level), or if you are looking at the 10% to 90% charge level, the rise time is calculated as approximately 2.2t (or 2.2RC), would this also hold true for the fall times, given the capacitor discharging through the same resistor? In other words would the FALL TIME 90% to 10% = ~ 2.2RC as well?

That will form one part of my end formula, but doesn't take into account all the other variables... if there are any mathletes out there who have some additional input on what I am trying to do, I'm all ears!

Thanks,

Dave

Mike G

Given a 50% duty cycle and
f = frequency
R = resistance
C = Capacitance

(1/f)/2 << RC * 5

where << means RC * 5 is a lot more than (1/f)/2.

if (1/f)/2 = RC * 5 then the cap will charge to its final value in half the pulse width.

Mike G

Clarify:

(1/f)/2 = T/2 and is the amount of time a 50% duty cycle is high or low.

RC is the time constant; t

At 5 time constants, RC * 5, the RC network will not full discharge in a single pulse.

Simplify
(1/f)/2 << RC * 5
T/2 << 5t
T << 10t

Solve for RC for a 60Hz 50% duty cycle
RC >> T/10
RC >> 60/10

If the Duty cycle is not 50% then you have two equations. One for the high pulse and one for the low.

LoopyByteloose

It seems that plugging in a formula is difficult in this situation. Essentially, we have all been avoiding getting into exactly what dV/dt implies. It is a generalization that includes all shapes of supplied voltage curves. I am suspecting that you do not have a 50% duty cycle square wave and that you are using a half wave rectification scheme.

On the one hand, the RXC = tau is useful, but not everything. It just provides a conceptual point of 'tau' that represents 0.37 of the original V.

http://www.electronics-tutorials.ws/rc/rc_1.html

You need to locate other points that are less than 'tau' on the natural log cure in order to find out when a certain sized capacitor will trigger you logic shift from 1 to 0.

TRY Vc = Vs (1 - (e x exp(-t/RC))) Where Vs is your 100% voltage and Vc is your ripple target (say 80% or 90%) for Voltage Across Capacitor

* Where:
* Vc is the voltage across the capacitor
* Vs is the supply voltage
* t is the elapsed time since the application of the supply voltage
* RC is the time constant of the RC charging circuit


That represents just half the problem, you still have to keep ripple above your cut off and ripple filtering usually assumes a sine wave. If you want to calculate for a 10% or 20% ripple originating from a sine wave, there are formulas both for full wave and half wave rectification, but other wave forms might require a bit of calculus to get to a real answer. But you are really going to have to dig into calculus if you pulse source is not a sine way or one of the other well published wave forms.

I was suggesting you use the Ripple Formula to get an estimate of capacitor size when power on, And using the Decay Formula to get an estimate of what is a minimal C when power is shut down AT ITS PEAK . Somewhere between the two should offer a good fit.

For a half-wave rectification:

Vpp = I/fC

where

* Vpp is the peak-to-peak ripple voltage
* I is the current in the circuit
* f is the frequency of the ac power
* C is the capacitance


Of course, power may be shut off anywhere in the sine wave cycle and so you have a range of response times dependent on how fully charged the ripple capacitor is at the time power is removed.

xanatos

Loopy B - that was awesome! I am driving an optocoupler with a half-wave rectified AC signal. The output of the opto is just a transistor, so I'm estimating a duty cycle of around 40%. Your post above pretty much describes exactly what I'm trying to do, and gives me some adaptable math to play with. Thanks!

LoopyByteloose

OMG, there is hope for all of us late in life learners! I never completed a Calculus course in university, though I aced all the math course I took. Sadly, my mental arithmetic is not alway up to par - everything needs to be rechecked.

Considering that nearly all the the industrial revolution and the space race have been based on Calculus, the modern world wouldn't be what it is without Newton. It is a good thing to learn - even late in life.

lardom

Loopy Byteloose wrote: »

OMG, there is hope for all of us late in life learners! I never completed a Calculus course in university, though I aced all the math course I took. Sadly, my mental arithmetic is not alway up to par - everything needs to be rechecked.

Considering that nearly all the the industrial revolution and the space race have been based on Calculus, the modern world wouldn't be what it is without Newton. It is a good thing to learn - even late in life.

@Loopy, thank you for the rationale. This morning I realized that Fourier transforms are Calculus equations which I never studied in school. I resisted learning a subject I thought I would never use. Since I am determined to understand how the transforms work I will finally buy a book today. In the process I will also learn something about Isaac Newton, one of the great minds in physics.

User Name

@xantos: A great aid for "shoot-from-the-hip" types is SPICE. I think you'd be absolutely delighted at the results of transient analyses of your proposed circuit. Changing values and even circuit topology is extremely quick and easy, and the new results take just seconds to graph.

Nowadays, the best source for free SPICE is Linear Technology, with their LTspice IV. Once you get over the tiny learning curve, you'll never look back.

@lardom: Isaac Newton, imho, was rather more than "one of the great minds in physics."