Starting to experiment with Spin. Attached are the comments in the communication object for the LRF (lots of typo's - sorry, still working on it). The multi-processor capability of the Prop is great fun to play with.
The software controlling the DS00VQ100 timer chip will run on its own cog in the background, whilst the user interface will run as fast as you can type or as fast as the host micro wants to talk.
The custom SPI driver will have to be written in PASM because Spin is too slow for high speed data transfer.
Soon, I'll also start building some Forth words, and maybe even write some C (my native language). :coffee:
First a bit of background. I work with a University group making meteorological LIDARs for measuring cloud density and icy-ness. Our particular lidars derive all data returns from ratios of returned light so produce calibratable back-scatter and depolarization images. They're expensive and cranky machines right now. (Though they should get a lot less cranky when I'm done fixing the controllers for our transmitter laser)
Anywho, we use a single telescope for our transmitter and receiver. We multiplex them using a polarizing beam splitter and a quarter wave plate. The polarizing beam splitter reflects or transmits based on the linear polarization of the incoming light, while the quarter wave plate converts the linear polarized light to/from circularly polarized light. The "magic" happens when clockwise circularly polarized light from the transmitter scatters off an object and returns as counterclockwise polarized light. After the quarter wave plate this return light is perpendicularly polarized relative to the transmitter light and is routed to the receiver by the polarizing beam splitter. more infoPretty cloud pictures from Colorado (LIVE)
We pay careful attention to back scatter inside our telescope and multiplexer. I think our reciever only sees 1/1,000,000 of the transmitters pulse. Still that scattered light pulse is ~1,000,000x larger than the returns we look for, we count photons. Always starting with blinded geiger mode APD's makes calibrating the data interesting. We tolerate this because the multiplexed transceiver telescope eliminates a lot of alignment errors while keeping all the critical optical alignment on our optical bench. It also really boosts the overlap between the transmitter's beam and the receiver's field of view, greatly helping signal to noise and range.
Thought the multiplexed transceiver optical design might be useful here too.
I've also considered how to get high counter resolutions. My best idea so far is to use a tapped delay line, 4 counters in 2 cogs on an overclocked propeller to get an aggregate counting rate of 600MHz.
Getting greater effective resolution by sending a lot of pulses and dithering the timing delays with an uncorrelated noise source, is also clever. This sounds a lot like a first order Sigma Delta ADC. I wonder if there are ways to build timing circuits similar to higher order Sigma Delta ADCs?
I'm REALLY curious how your time expansion circuit works. I've only seen an article showing this done optically. I.e. modulate a chirped optical pulse with the signal of interest, then run the pulse through a dispersive medium to elongate the pulse, followed by a conventional detector and ADC at a slower rate. Hm... the sample and hold arrays (or a long bucket brigade chip) I think a lot of oscilloscope chips use could do similar things in discrete time, but I doubt that's what's being used here.
Thanks for the interesting post. It's great to hear from someone familiar with laser systems, and yours are really cool, scientific grade instruments.
They're expensive and cranky machines right now.
Many LRF designs work well as laboratory devices but can be a challenge under field conditions and are difficult to mass produce.
Thought the multiplexed transceiver optical design might be useful here too.
It has been said that mother nature has a cussed sense of humour. The advantage of concentric optics (perfect field of view overlap) becomes the very thing that compromises performance in other ways, namely sensitivity to unwanted backscatter. This is usually gated out but makes it important to keep the system clean nonetheless. In the proposed LRF design for hobby applications it is both cheaper and more practical to use separate optics without the beamsplitter. You can imagine the problems of a small robot bouncing along a dusty road. Not only will the vibration mess up the alignment if the optics are too complex, but there is a good chance of layers of dirt collecting on the lenses. The design should be able to tolerate more than 90% loss of lens transmission without affecting the short range performance. But this is an LRF, not a LIDAR.
Of course it really helps that a hobby LRF doesn't need calibrated signal strength. I do not envy you having to handle a photon sensitive APD to get this kind of data. I've got a mail in my in box from UN-REDD (United Nations Reduced Emissions from Deforestation and Degradation) via our local Scientific Council where they're asking me to help with the design of an instrument that gives calibrated backscatter measurements for forestry analysis. They also want spectrographic info from multiple lasers of different colours. They've been testing one of my other designs and like the results (especially the part where the equipment is cheap). This kind of project is too complicated for me to handle on my own so I'll probably turn the job down but it does go to show how difficult it is to design laser equipment that gives high quality backscatter information at a reasonable price. They must be desperate to be talking to me.
I've also considered how to get high counter resolutions. My best idea so far is to use a tapped delay line, 4 counters in 2 cogs on an overclocked propeller to get an aggregate counting rate of 600MHz.
There are many different strategies for improving the resolution of LRF timing. The best one for a given application depends on what you want to achieve and what the temporal characteristics of your laser are (PRF and pulse width). If you don't need a particularly high resolution then a high speed clock is an easy way to go. I would be surprised to learn that LIDAR needs more than a few meters accuracy but you, perhaps, have something more in mind?
The most accurate LIDAR method is to use an FMCW laser (frequency modulated, continuous wave). This is also how most low cost or high resolution LRFs work. You're probably using a frequency doubled YAG or an iodine laser so CW is not an option. Similarly, the project described in this thread is based on a pulsed semiconductor laser so direct TOF is the only way to measure distance. For the hobby LRF design I also looked at the Prop's clock as a possible timebase. Unfortunately it uses a PLL so it probably has too much jitter to be useable at cm resolution.
dithering the timing delays with an uncorrelated noise source
The "dithering" method was the inspiration for the DS00VQ100 timer design but is not the whole story. I was always bothered by the square law linking the number of laser pulses to the statistical resolution. It just seemed wasteful to me.
I'm REALLY curious how your time expansion circuit works. I've only seen an article showing this done optically
One of my first designs was based on optical mixing similar to what you describe but it wasn't a practical solution for my application. Instead, I shifted some of the concepts into the electronic domain and then simplified the architecture so that it now fits into a single chip. There are no delay lines or memory storage. Instead, the resolution improvement over the applied timebase is linearly tied to the number of laser shots used to make the measurement.
The trickiest part of the design (and what makes it different from a sampling oscilloscope) is that there is no high speed clock. Instead, the resolution just depends on how many shots you can afford to take. In your case, suppose that you wanted to match the performance of a 600MHz timing clock using a base frequency of only 60MHz. You can reach this resolution in just 10 laser shots. No overclocking or timers or delay lines required. There is almost no theoretical limit to the equivalent timebase that you can reach by simply taking more shots. I have tested it to an equivalent timebase of 100GHz without any problems, although you start to see some statistical non-linearities because of system noise. For the hobby LRF project we'll stick to between 500MHz and 30GHz.
If I'm understanding you correctly, your time expansion relies on having a periodic signal. So in some ways it's similar to the sub-sampling techniques I've seen used on old 10GHz Oscilloscopes where samples from multiple periods of a wave-form were combined to make a single image with a higher effective time resolution. This probably also shares some similarities with the single pixel camera and compressed sensing.
For the UN-REDD thing I'd really suggest they look at a HSRL setup if they want calibrated data. (i.e. like the systems I'm helping with) All the data with HSRL comes from ratios of returned light, so path attenuation uncertainty goes away. To do this, our lidar uses a Q-switched frequency doubled Nd:YAG laser, locked to an Iodine line. The Iodine filter in the the receiver lets us separate molecular scattering from air and particulate scattering. Since we can get a pretty good idea how much air there is at any point in the atmosphere, we can use the atmosphere as a universal "calibration target" for all the other returns.
Lawson, thanks for the advice about UN-REDD, I'll talk to them next week.
The DS00VQ100 chip was designed as a hobby level device that demonstrates the advantages of time expansion. The timer circuit is based on sub-sampling concepts but it uses a totally digital manipulation of the sampling pattern, which I think is different from most other technologies. This digital architecture makes the design of systems using the chip very easy because there is good immunity to analog noise and no high frequency tracking to worry about.
A feature of the chip which should be interesting to people unfamiliar with time expansion, is an output that provides a live image of the time expanded signal. Users can connect this output directly to a pin on the Prop or similar processor and perform timing measurements at the speed of light. The time expanded image can be expanded to improve resolution, contracted to increase speed or reversed so that people can get a feel for what it's like to see live events run backwards.
I'm still having trouble getting my head around the "time expansion" thing.
Clearly this cannot be not literal time expansion (unless I'm confusing time dilation)? There is some technique that does something that can be "interpreted" as "time expansion"?
I keep thinking this other something is pulse-phase measurement; the phase difference translates into distance. Is pulse phase close? Is there a simple way to explain this without using the term "time expansion"?
Or is this an actual, standard technique, and just so new that I haven't heard about it yet?
Prof, there are many different strategies that can make the time base of a signal appear much larger that it really is. I've tried to Google a standard reference on the subject but what I have found doesn't usually cover the re-generation of "images" of the high frequency signal at lower frequencies. Instead the signal is usually digitised, but it is not a stretch to imagine that the "slow" signal can be reconstructed on the fly. For those interested in some of the circuits that are out there you can look for key words like:
ETS (equivalent time sampling) - this can create "equivalent" clock speeds in the THz range. Look at the PicoScope 9000 series at http://www.picotech.com/picoscope9000.html
UWB (ultra wide band) - This normally applies to radio or radar waves but is also applicable to pulsed lasers of the type that we are using. Try: http://en.wikipedia.org/wiki/Ultra-wideband for a general explaination of the theory.
Sub-sampling - as mentioned by Lawson this is an older method but can be applied in new ways. Try looking for sub-sampling and UWB at the same time to see the kind of work that is being done - especially new chip designs. These include circuits for decoding UWB signals as well as establishing accurate position.
It may be neccesary to write an application note for the DS00VQ100 chip to clarify the timing technology. I would like to finish the prototype LRF first then we can use real signals as examples. Only waiting for one last part - the Prop chip!
I'm following this thread with much interest. Does your scheme for high resolution timing measurements depend on having two clock sources? Like a BFO mixer?
I've not heard of a BFO before (didn't play with SSB) but I think it helps describe the mixer and its effect on the "downshifted frequency" quite well. Just doing some quick math it looks like the beat frequency has to be stable to about 10ppb (parts per billion) to get the kind of frequency downshift needed.
Whilst the BFO plays a role in establishing the relationship between the real-time signal and the "time expanded" version, it does not act directly on the signal. Instead, there is a harmonically linked, sub-sampling system that analyses the "UWB" signals. The reason for this is that a pulsed laser cannot be fired fast enough to be considered a continuous signal. Instead, it has to be treated as a string of very widely spaced events. In order to keep the temporal link between these events, both the base oscillator (that fires the laser) and the mixing oscillator (that shifts the return signal) have to be supremely stable.
In contrast, the system that calculates the "span" of the time expanded signal works directly with the beat frequency (or a low order, even harmonic) because measurements can be made at the much higher oscillation frequency.
If this is starting to make sense to people then I'll try to find some more references based on RF theory. As I have discussed with prof_braino, one of the difficulties in describing the timer in terms of "frequencies" is that it was originally designed in terms of "time" only. This is because many comparable systems use analog ramps to perform ETS where there is no frequency component involved. Mathematically however, the equations work almost as well when based on frequency. The only anomaly that I'm aware of is that sometimes negative frequencies show up. For this design we would have to interpret this as meaning a mirrored or "time reversed" image of the signal rather than the usual RF interpretation of a lower sideband to the IF.
I thought it may be of interest to some of you to know how to design your own chips.
Custom designed chips are very powerful and can solve problems that are beyond the reach of ordinary microprocessors. One of the reasons for this is that the logic inside the chip can be designed to execute in parallel, not sequential like software instructions. You can think of this as like having thousands of processors running at the same time.
Most chip designs end up being a mixture of "combinatorial logic" (gates like AND, OR etc) and "sequential logic" (counters, processors etc). The method of designing these logic elements is very similar to writing software in that a high level, abstraction language is used - either VHDL or Verilog. These languages allow you to create complex gate structures with just a few lines of text, or, like assember, you can design gate by gate.
Getting your design onto silicon is also very easy. Depending upon the number of chips that you want to make you can use FPGAs (small volume), ASIC (medium volume) or custom fabrication (high volume). At this time, FPGAs are becoming more popular, even for high volume designs, because they can be developed very fast and then "programmed" and "re-programmed" on the final circuit board.
The chip vendors usually supply "development systems" for their silicon fabrics free of charge. Included in these development systems is a simulator that allows you to perform comprehensive testing of your design before "burning the chip". These simulators are increadibly accurate and take into account switching speed delays, internal track lengths, port pin drive capability and a myriad of other factors that affect chip performance. Once a design has passed simulation testing it will run on the real board.
One of the cool things about using an FPGA chip is that if you make a mistake on your PCB layout you can correct it by moving the pin assignments and functions around inside the chip - think of the chip as a reconfigurable pcb. In fact, it is quite normal to totally change your design over time without having to make a new PCB. This is why FPGAs are used in many products from cell phones to satellites.
So what can you do with your chip? Designs can be very simple, maybe a few gates that decode addresses or convert logic patterns from one form to another. They can also become more complicated, like interface controllers. For example, it is possible to use a single chip to add UARTS, SPI, I2C, ADCs, DACs, Ethernet, parallel ports, servo drivers, stepper motor drivers, camera interfaces etc to the Propeller. Chips can also be very sophisticated, incorporating multiple microprocessors, RAM, ROM, interfaces and custom logic. These are usually termed SoC (Sytem on Chip) because they can run by themselves.
Selecting a good chip fabric allows you to start with a simple logic design, say one AND gate, and then gradually expand your design by adding more and more features - same chip, same PCB. The internal logic can respond to signals of 300MHz or more and your design can use hundreds of thousands of gates if necessary. The DS00VQ100 chip uses 250,000 logic gates.
I think that young people wanting to make a career in electronics need to know three things:-
1. How to write software in C/C++.
2. How to design digital circuits in VHDL or Verilog.
3. The basics of analog circuits.
This knowledge is the foundation of most software and harware designs. Everything else can be built from this foundation.
As mentioned above, an important element of chip design is simulating the actions of the chip before committing to hardware. The first tests that I am doing on the DS00VQ100 chip are to make sure that the SPI bus works properly. I am using a simulator from Mentor Graphics. Both the chip design and the simulation files (test bench) are written in VHDL.
The picture below shows the results of a data transfer between the simulated chip and a simulated microprocessor. There is lots of detail provided in the simulation so you can see all the internal data states and the actions of individual gates as well as the signals on the pins of the chip.
Once the communication is working in the simulator, I can program an FPGA with the chip design and test it on a real board. I use a real processor with a real SPI port and transfer real data. I can no longer look inside the chip but the signals on the pins look similar to the ones in the simulation.
As part of the tests, I deliberately feed data with errors in it to the chip to see how it handles it. Exactly like the simulation I can tell that specified data format is the only one recognised by the chip and that errors in the data will not cause any hardware damage to the final LRF.
Still looking good . Haven't had time to read the thread. I'm designing a fast (40kHz) data acquisition system for a linear photodiode array
The content of this thread is ramping up to the sky, we've reached VHDL ... now, I'd love to use an FPGA for this work, would certainly be interesting - not that I have much to parallelize, but I'm still in the TTL logic world when designing hardware logic circuits from scratch
I forgot to mention something in the earlier post. Some of the development systems for FPGAs also have graphical editor capabilities. This means that you can design by drawing a circuit diagram exactly like making a schematic for a PCB. The development system takes the diagram plus whatever other design entry files you may have (like VHDL) and "compiles" them into a VHDL or Verilog entity. This can then be programmed into the FPGA chip. The compiler also takes care of Boolean optimisation so you end up with a really neat solution, even for the most complicated digital designs.
How Time Expansion Works - an attempt at explanation.
A phenomenon that is well understood in the field of radio frequency (RF) electronics is “mixing”. Mixing is the process of changing the frequency of a sinusoidal RF signal (Fsignal) by multiplying it with a different frequency from a “local“ receiver oscillator (Flocal).
The signal that comes out of the mixing process is actually composed of two parts, a sum frequency (Fsum = Fsignal + Flocal) and a difference frequency (Fdifference = Fsignal - Flocal). The lower, difference frequency component can be extracted using a low pass filter or the higher, sum frequency component can be extracted using a high pass filter.
Extracting the lower frequency component is sometimes called “frequency downconversion.”
Perhaps a less well known phenomenon is the preservation of phase information during the mixing process. This can be seen when two separate signals of the same frequency, but with a different phase, are downconverted using separate mixers but the same local oscillator.
For example, suppose two signals, A and B, are oscillating at 10MHz, but signal B has a 90 degree phase lag with respect to signal A. Each signal is fed into a separate mixer where they are mixed with the same local oscillator running at 9MHz. After mixing, the difference frequency of both signals will be 1MHz. Perhaps surprisingly, the phase difference between these downconverted signals remains at 90 degrees.
The consequences of phase preservation may not be immediately obvious, so let’s have a closer look.
Signal A is oscillating at 10MHz. Each oscillation takes 1/10^7 seconds = 100ns.
Signal B is phase shifted by 90degrees. This equates to a delay of 90/360 x 100ns = 25ns.
If we take the leading edge of each signal as an event in time, we can see from the equations that event B occurs 25ns after event A. Of course, these events are repeated many times every second but that does not alter the basic principle that each event on signal B is delayed by 25ns with respect to signal A.
So what happens to the time difference between these events after frequency downconversion? We know that the phase information is preserved, therefore:
The downconverted signal of A is oscillating at 1MHz. Each oscillation takes 1/10^6 seconds, or 1us.
The downconverted signal of B is shifted by 90degrees. This equates to a delay of 90/360 x 1us = 250ns.
We can see that a delay of 25ns in the original signal B has been changed during the mixing process to a delay of 250ns in the downconverted signal B. Mmm, I think we’re on to something here...
The principle of downconverting can be applied to non-sinusoidal signals as well.
Suppose signals A and B are square waves rather than sinusoidal waves. They have the same frequency as before (10MHz) and, as before, signal B has a 90degree phase shift with respect to signal A (a 25ns delay). If these square waves are fed into a mixer then the output will be a downconverted reproduction of the two square waves with the phase information preserved. This means that the leading edge of downconverted signal B will delayed by 250ns from the leading edge of downconverted signal A. The only requirement for this system to work is that the signal has a repeated cycle.
Since the phase of the leading edge of signal B is preserved during mixing, then the phase of the trailing edge of signal B is also preserved. In fact, the phase of any event that forms part of signal B will be preserved. This means that we don’t have to use a square wave or a sinewave for our signals.
Using this knowledge, let’s make a laser rangefinder.
Signal A is a short “spike” created every time a pulsed laser fires. Signal B is the return laser signal that has reflected off a target some distance away and been picked up by a photo-detector. There is a delay between signal A and signal B of 25ns. We know that the distance to the target can be calculated from the equation distance = speed of light x time / 2. The divide by 2 is to allow for the measured time being to the target and back again, the speed of light is constant, so all we need to know is the time.
In our laser rangefinder the laser is firing at 100kHz. In other words, it is a repetitive signal with a period of 10us. Since the firing is repetitive, we should be able to downconvert the signals.
We feed signal A (outgoing laser pulse) and signal B (return laser pulse) into two separate mixers. This time we will use a local oscillator running at 99kHz. The downconverted versions of signal A and signal B will have a frequency of 1kHz. They are now downconverted signals with a period of 1ms.
The conversion of the original 10us period of the signals to signals with a period of 1ms equates to a “timebase expansion” of 100:1. This is how much you will have to change the timebase on an oscilloscope to make the downconverted signals look the same size as the original signals.
The time difference between signal A and signal B has also expanded 100 times to 100 x 25ns = 2.5us.
Since we know that the phase and time locations of events are preserved during the mixing process, we can make timing measurements between downconverted events to work out the time difference between the original events. We simply divide our answer by the timebase expansion.
So, for a timebase expansion of 100:1, a downconverted duration of 2.5us equates to a real time duration of 2.5us/100 = 25ns. In other words, if we measure 2.5us between the leading edges of the downconverted signals, we can be sure that the actual time between those edges is 25ns.
By designing a circuit with extremely stable oscillators, we can create very large timebase expansions. Then we can use a low frequency timer to accurately measure events that are happening at the speed of light.
This system of oscillators and mixers is known as a “beat frequency oscillator mixer” (thanks to bkgable). By adjusting the frequency of the local oscillator, the amount of timebase expansion can be controlled. The DS00VQ100 chip includes all the circuitry required to perform downconversion and the timebase expansion of laser signals in a laser rangefinder (if it works!). The timebase expansion can be controlled from 200,000 times to several million times. At a timebase expansion 881,601 times, events at the speed of light appear to be happening at the speed of sound, making it possible to use a Ping)))™ timer on your new laser rangefinder...
I want to personally thank you for taking time and teaching me all the things I have either forgotten or am newly discovering. I am enthralled by the FPGA design and want to learn much more on that topic. Again thank you and I cant wait to get one of these for my robot project.
Thanks for the explanation of the "theory of operation". This theory could be applicable to other kinds of precise time measurement. Like radio interferometric positioning.
I knew the part about 1 degree of phase at RF giving 1 degree at the down converted frequency but with "time expansion". But I did not know that this applies to a down converted pulse train as well as sinusoids. I guess the pulse train spectrum is down converted and preserved in the time domain. And averaged over a noisy LO.
A couple questions:
I assume the second mixer with 90 degrees of phase shift is for convenience of the measurement and not part of some Inphase/Quadrature calculation?
Are the local oscillators sinusoidal or square wave?
Are you depending on the edge switching on the FPGA being faster than the clock rate? You mentioned LVDS earlier.
Beat frequency time base expansion is something I can get my head around. Now its making sense. So does this explanation apply to the profession surveyor's laser ranging devices? Thanks for the effort.
Let me see if I got this: The laser signal is send (and the return signal received) at precise frequency. This is combined with a second slightly different but equally precise frequency, to produce a beat frequency. By making the two frequencies very close, we can generate a very slow beat frequency, and can make it in a range our micro can easily work with.. The beat frequency preserves the characteristics of the original frequencies. Since phase information is also preserved, we can now look at the phase information from the original sent and returned signals. The phase information is used to determine distance.
Thanks Zap-o and Bean for the support. Many people reading this thread will be all too familiar with the emotional drain of tackling a project of this complexity. Every word of encouragement helps me to fight the next battle.
bkgable,
This theory could be applicable to other kinds of precise time measurement. Like radio interferometric positioning.
For sure. An interesting area of research is UWB (ultra wide bandwidth) positioning, where RF pulses are used instead of continuous waves.
I assume the second mixer with 90 degrees of phase shift is for convenience of the measurement and not part of some Inphase/Quadrature calculation?.
Yes that's right. I only chose 90 degrees to make the maths easier to follow, there is no specific Quadrature Detection going on. The actual phase difference betweeen the outgoing and return signals will change as the distance changes.
Are the local oscillators sinusoidal or square wave?
In the explanation I discussed only the principle, not the implementation. The answer to your question depends on the type of laser and the type of mixer. LRFs that use FMCW (frequency modulated, continuous wave) use a sinusoidally modulated laser and a sinusoidal local oscillator. In the DS00VQ100 chip I've stuck to an almost exclusively digital design that uses a square wave LO generated from a TCVCXO (temperature compensated, voltage controlled, crystal oscillator).
Are you depending on the edge switching on the FPGA being faster than the clock rate?
In the DS00VQ100 edge speeds are important to preserve the spectral characteristics of the downconverted signals. However, for all LRF designs a more important issue than edge speed is the jitter on the LO signal. This determines the theoretical downconversion limit. I think I mentioned this earlier as one of the reasons why the clock on the Propeller micro wouldn't work well for downconversion. The Prop clock signal is produced by a PLL (phase locked loop) and they usually suffer from very high jitter. In fact, many micros deliberately add jitter to their clocks to reduce their spectral power which would otherwise cause RF interference and upset the FCC. It makes them useless for downconversion.
prof_braino,
So does this explanation apply to the profession surveyor's laser ranging devices?
Yes, that's right. Most of them use a low power, FMCW laser aiming at a reflective target to get a strong signal for good accuracy. I think that you would be surprised how simple their downconversion circuit can be.
The laser signal is sent (and the return signal received) at a precise frequency. This is combined with a second slightly different but equally precise frequency, to produce a beat frequency. By making the two frequencies very close, we can generate a very slow beat frequency, and can make it in a range our micro can easily work with..
Correct - a very good description.
The beat frequency preserves the characteristics of the original frequencies.
Not quite. The beat frequency provides the timebase for downconversion but it is the mixer that preserves the characteristics of the original signals. You may be able to improve on the understanding of this statement by considering that the term "mixer" is synonymous with the term "sampler". It depends on the circuit design as to which term you're most comfortable with. As mentioned previously, the DS00VQ100 uses a "sub-sampling mixer" which is possibly the most confusing description of all.
Since phase information is also preserved, we can now look at the phase information from the original sent and returned signals. The phase information is used to determine distance.
Correct.
Just keep in mind that in the DS00VQ100 chip the phase information cannot be measured directly as a phase angle. Instead, a reference output that clocks once every 360 degrees is provided along with the downconverted signals. The relative phase of downconverted events can be measured using an ordinary timer that starts when the reference signal goes high and ends at the event of interest. The period of the reference signal must also be measured, and the ratio of the two times (Tevent / Tref) gives the phase angle. This is called "direct-digital phase measurement".
To convert this timing/phase information into a distance, just multiply by the range:
Distance to event [m] = (downconverted time to event / period of reference) * range [m]
Just an amusing anecdote - I wanted to know what the lowest acceptible clock speed was that could still give a reasonably accurate distance result. By applying maximum downconversion and displaying the signals on an oscilloscope screen I was able to use a stopwatch ...
Just an amusing anecdote - I wanted to know what the lowest acceptible clock speed was that could still give a reasonably accurate distance result. By applying maximum downconversion and displaying the signals on an oscilloscope screen I was able to use a stopwatch ...
So, if we wanted to, we could down convert to audio range, and send the signal directly to an audio amplifier, an output our distance as pitch. This would be a useful experiment in verifying the hardware is functioning before we add the micro processor, in addition to allowing blind people to accurately perceive distances.
The downconverted frequency doesn't change with the distance to the target, only the relative phase.
However, the timing is certainly easy enough for a micro to create the audio effect you mention. I've seen a pair of glasses made for blind people that does precisely what you're suggesting (very expensive) and I've worked with the local society for blind people at finding a cheaper solution. The problem that came up was that blind people rely heavily on their hearing so they don't like extra noises interfering.
Seems like your chip might be able to be used for an RF X,Y positioning scheme. Send out a very short RF pulse to a cooperative receiver that has a delay line before sending out the pulse back. Switched RX and TX. With 2 of those I get X,Y positioning for my autonomous around the house rover. Probably quite a few things to be considered though. Like UWB RF LNA and PA chips. Can you make your laser diode driver EMI noisy? And a switched pulse driver for the receiver like the transmitter?
I need a combined Hokuyo LRF and cm short range positioning. And of course no more than the $130 I spent on John Grands LRF.
The chip will available for sale once it has been tested in the LRF. I'm waiting for one more PCB - there is still a holdup with the Propeller. Without making any promises I would say before that before the end of the year it should be ready. This may seem like a long time to wait but I need to verify every aspect of performance before I can finish the data sheet.
Seems like your chip might be able to be used for an RF X,Y positioning scheme.
The chip has not specifically been designed for this application although the principle of high resolution timing is part of a positioning system of this type. The main reason that I have avoided RF UWB is because it is a minefield of patents and litigation. I think it will be another 20 years before low cost "location" systems become commercially available, not because of the technology, but because of licensing restrictions.
The power supply module is now complete. I have done some preliminary testing and the results look good.
The module has four output voltages:
1.5V DC - powers the core of the DS00VQ100 chip
3.3V DC - supply to the receiver amplifiers, the Propeller chip and all other I/Os
7.8V DC - main power to the laser
Programmable HV - bias for the APD
The first three rails have been tested but the final one will take a bit longer to complete.
The design specification was that the LRF should work from 4.8V batteries. Actual results show optimal operation from 3.9V DC to 7.6V DC.
There is an auxiliary power input from the USB port and this also works fine. The idea behind this particular module is that for testing and programming purposes the LRF gets power directly from the USB port. Once everything is working fine then it can be connected to a battery. If both supplies are connected at once the unit runs from the higher voltage.
The processor module is complete and basic tests are done.
In the picture the processor module (top) is plugged into the power supply (bottom).
The design of the processor is based on a typical Prop prototype board. There is a USB interface for programming, 64k EEPROM, some LEDs, an external connector etc. The main purpose of the processor board is to communicate with the DS00VQ100 chip. This communication is in the form of a SPI bus as well as direct connections to the time expanded signals.
The reason for using a SPI bus is that it is a common protocol found on most microcontrollers. By removing the processor board you can get direct access to the pins of the SPI bus and connect another type of processor if you want. I have tested both the Prop and the Arduino and both work just fine.
There is still some software to write for the Prop but my focus for now is on getting all the hardware running. I'll do this by writing test routines that check out each hardware function. Once the hardware is running I will take the software test routines and re-package them into a fully working sysytem.
To keep things simple I'm only working in Spin, PASM and C/C++ for now. When the system is fully operational I will bring in the other languages. The reason for this selection of languages is two fold:
1. Spin and PASM are at the opposite ends of the speed spectrum. If the LRF design works with both of these languages then speed will not be a constraint for someone else writing their own code.
2. I'm using the C/C++ of the Arduino to make sure that the hardware performs just as well with any processor. The Arduino has a hardware SPI port so this makes both the software and hardware very different from the Prop. This is a good test of the LRFs interface protocols.
I'm liking your modular board design. Stacking multiple Arduino shields is problematic since pins have to be rerouted and the only mechanical connection is through the headers. I can see the four large standoff locations on your boards in the pictures, Is there a bus between boards? I would be interested in seeing a board layout showing the form factor. So I can build my own UWB board that stacks with your DS00VQ100 board.
Keep sharing your great design work as it progresses.
The photo shows the stacking arrangement in a bit more detail. The bottom board is the timer board which carries the DS00VQ100 chip, the middle board is the power supply and the top board is the processor. All headers are dual row, 0.1" pitch and are green in the photo. The signals travel in a zig-zag pattern between the boards so that stacking can continue indefinitely. The next header is on the processor board (not populated) and is to the left. The standoffs are 3mm type with a male thread at one end and female at the other. The yellow row along the bottom edge is test points connected to the DS00VQ100 chip so that real time and expanded signals can be seen on an oscilloscope.
Testing of the timer module has started. This is a simple board form a layout point of view but it has many functions, each of which has to be checked carefully.
To start with, I programmed the FPGA with a dummy design that smply toggled all the port pins at preselected frequencies. By following the signals with a 'scope I could check that each chip pin went to the correct pin on each header.
I almost blew up the high voltage power supply during this test. I had forgotted that it was connected to a pin on the chip and it starting creating hundreds of volts as soon as the test design started running. It is supposed to be controlled by a circuit in the DS00VQ100 chip, but of course, the circuit wasn't there... :blank:
Just finished testing the programmable, high voltage generator for the APD bias. It easily reaches 200V DC and it will go well over 250V for high breakdown APDs. Control is via an 8 bit register giving an adjustment resolution of about 0.8V at the design voltage of 150V DC. This should be adequate for reasonably good noise control on the APD. The efficiency looks really good. Producing 150V DC the HV generator draws less than 10mA at 5V input. This efficiency is partly because the circuit uses a high quality inductor - always a good idea with a switch mode power supply.
Timer Module - update
I've also been testing the resolution of the beat-frequency-oscillator-mixer. The limiting resolution is determined by the frequency stability of the TCVCXO's (temperature controlled, voltage controlled, crystal oscillators). Over a period of several minutes the timing stability (without a software control loop) was better than ±2cm equating to a frequency stability of around 4ppb (parts per billion) which is better than expected. I think this is because the temperature is very constant and the circuits are running cool. Once in the field a software control loop will be needed to compensate for temperature changes.
Under the test conditions the timing resolution was ±0.5cm. If you tried to design a high speed timer to directly measure the signal with this precision it would need a clock frequency of 30GHz.
The equivalent time expansion was over 2.5 million times.
Comments
The software controlling the DS00VQ100 timer chip will run on its own cog in the background, whilst the user interface will run as fast as you can type or as fast as the host micro wants to talk.
The custom SPI driver will have to be written in PASM because Spin is too slow for high speed data transfer.
Soon, I'll also start building some Forth words, and maybe even write some C (my native language). :coffee:
DS00VQ100_LRF_Terminal.spin
Anywho, we use a single telescope for our transmitter and receiver. We multiplex them using a polarizing beam splitter and a quarter wave plate. The polarizing beam splitter reflects or transmits based on the linear polarization of the incoming light, while the quarter wave plate converts the linear polarized light to/from circularly polarized light. The "magic" happens when clockwise circularly polarized light from the transmitter scatters off an object and returns as counterclockwise polarized light. After the quarter wave plate this return light is perpendicularly polarized relative to the transmitter light and is routed to the receiver by the polarizing beam splitter. more info Pretty cloud pictures from Colorado (LIVE)
We pay careful attention to back scatter inside our telescope and multiplexer. I think our reciever only sees 1/1,000,000 of the transmitters pulse. Still that scattered light pulse is ~1,000,000x larger than the returns we look for, we count photons. Always starting with blinded geiger mode APD's makes calibrating the data interesting. We tolerate this because the multiplexed transceiver telescope eliminates a lot of alignment errors while keeping all the critical optical alignment on our optical bench. It also really boosts the overlap between the transmitter's beam and the receiver's field of view, greatly helping signal to noise and range.
Thought the multiplexed transceiver optical design might be useful here too.
I've also considered how to get high counter resolutions. My best idea so far is to use a tapped delay line, 4 counters in 2 cogs on an overclocked propeller to get an aggregate counting rate of 600MHz.
Getting greater effective resolution by sending a lot of pulses and dithering the timing delays with an uncorrelated noise source, is also clever. This sounds a lot like a first order Sigma Delta ADC. I wonder if there are ways to build timing circuits similar to higher order Sigma Delta ADCs?
I'm REALLY curious how your time expansion circuit works. I've only seen an article showing this done optically. I.e. modulate a chirped optical pulse with the signal of interest, then run the pulse through a dispersive medium to elongate the pulse, followed by a conventional detector and ADC at a slower rate. Hm... the sample and hold arrays (or a long bucket brigade chip) I think a lot of oscilloscope chips use could do similar things in discrete time, but I doubt that's what's being used here.
Lawson
Many LRF designs work well as laboratory devices but can be a challenge under field conditions and are difficult to mass produce.
It has been said that mother nature has a cussed sense of humour. The advantage of concentric optics (perfect field of view overlap) becomes the very thing that compromises performance in other ways, namely sensitivity to unwanted backscatter. This is usually gated out but makes it important to keep the system clean nonetheless. In the proposed LRF design for hobby applications it is both cheaper and more practical to use separate optics without the beamsplitter. You can imagine the problems of a small robot bouncing along a dusty road. Not only will the vibration mess up the alignment if the optics are too complex, but there is a good chance of layers of dirt collecting on the lenses. The design should be able to tolerate more than 90% loss of lens transmission without affecting the short range performance. But this is an LRF, not a LIDAR.
Of course it really helps that a hobby LRF doesn't need calibrated signal strength. I do not envy you having to handle a photon sensitive APD to get this kind of data. I've got a mail in my in box from UN-REDD (United Nations Reduced Emissions from Deforestation and Degradation) via our local Scientific Council where they're asking me to help with the design of an instrument that gives calibrated backscatter measurements for forestry analysis. They also want spectrographic info from multiple lasers of different colours. They've been testing one of my other designs and like the results (especially the part where the equipment is cheap). This kind of project is too complicated for me to handle on my own so I'll probably turn the job down but it does go to show how difficult it is to design laser equipment that gives high quality backscatter information at a reasonable price. They must be desperate to be talking to me.
There are many different strategies for improving the resolution of LRF timing. The best one for a given application depends on what you want to achieve and what the temporal characteristics of your laser are (PRF and pulse width). If you don't need a particularly high resolution then a high speed clock is an easy way to go. I would be surprised to learn that LIDAR needs more than a few meters accuracy but you, perhaps, have something more in mind?
The most accurate LIDAR method is to use an FMCW laser (frequency modulated, continuous wave). This is also how most low cost or high resolution LRFs work. You're probably using a frequency doubled YAG or an iodine laser so CW is not an option. Similarly, the project described in this thread is based on a pulsed semiconductor laser so direct TOF is the only way to measure distance. For the hobby LRF design I also looked at the Prop's clock as a possible timebase. Unfortunately it uses a PLL so it probably has too much jitter to be useable at cm resolution.
The "dithering" method was the inspiration for the DS00VQ100 timer design but is not the whole story. I was always bothered by the square law linking the number of laser pulses to the statistical resolution. It just seemed wasteful to me.
One of my first designs was based on optical mixing similar to what you describe but it wasn't a practical solution for my application. Instead, I shifted some of the concepts into the electronic domain and then simplified the architecture so that it now fits into a single chip. There are no delay lines or memory storage. Instead, the resolution improvement over the applied timebase is linearly tied to the number of laser shots used to make the measurement.
The trickiest part of the design (and what makes it different from a sampling oscilloscope) is that there is no high speed clock. Instead, the resolution just depends on how many shots you can afford to take. In your case, suppose that you wanted to match the performance of a 600MHz timing clock using a base frequency of only 60MHz. You can reach this resolution in just 10 laser shots. No overclocking or timers or delay lines required. There is almost no theoretical limit to the equivalent timebase that you can reach by simply taking more shots. I have tested it to an equivalent timebase of 100GHz without any problems, although you start to see some statistical non-linearities because of system noise. For the hobby LRF project we'll stick to between 500MHz and 30GHz.
For the UN-REDD thing I'd really suggest they look at a HSRL setup if they want calibrated data. (i.e. like the systems I'm helping with) All the data with HSRL comes from ratios of returned light, so path attenuation uncertainty goes away. To do this, our lidar uses a Q-switched frequency doubled Nd:YAG laser, locked to an Iodine line. The Iodine filter in the the receiver lets us separate molecular scattering from air and particulate scattering. Since we can get a pretty good idea how much air there is at any point in the atmosphere, we can use the atmosphere as a universal "calibration target" for all the other returns.
Lawson
The DS00VQ100 chip was designed as a hobby level device that demonstrates the advantages of time expansion. The timer circuit is based on sub-sampling concepts but it uses a totally digital manipulation of the sampling pattern, which I think is different from most other technologies. This digital architecture makes the design of systems using the chip very easy because there is good immunity to analog noise and no high frequency tracking to worry about.
A feature of the chip which should be interesting to people unfamiliar with time expansion, is an output that provides a live image of the time expanded signal. Users can connect this output directly to a pin on the Prop or similar processor and perform timing measurements at the speed of light. The time expanded image can be expanded to improve resolution, contracted to increase speed or reversed so that people can get a feel for what it's like to see live events run backwards.
Clearly this cannot be not literal time expansion (unless I'm confusing time dilation)? There is some technique that does something that can be "interpreted" as "time expansion"?
I keep thinking this other something is pulse-phase measurement; the phase difference translates into distance. Is pulse phase close? Is there a simple way to explain this without using the term "time expansion"?
Or is this an actual, standard technique, and just so new that I haven't heard about it yet?
ETS (equivalent time sampling) - this can create "equivalent" clock speeds in the THz range. Look at the PicoScope 9000 series at http://www.picotech.com/picoscope9000.html
UWB (ultra wide band) - This normally applies to radio or radar waves but is also applicable to pulsed lasers of the type that we are using. Try: http://en.wikipedia.org/wiki/Ultra-wideband for a general explaination of the theory.
Sub-sampling - as mentioned by Lawson this is an older method but can be applied in new ways. Try looking for sub-sampling and UWB at the same time to see the kind of work that is being done - especially new chip designs. These include circuits for decoding UWB signals as well as establishing accurate position.
It may be neccesary to write an application note for the DS00VQ100 chip to clarify the timing technology. I would like to finish the prototype LRF first then we can use real signals as examples. Only waiting for one last part - the Prop chip!
Making progress slowly. Boards are being assembled...
I've not heard of a BFO before (didn't play with SSB) but I think it helps describe the mixer and its effect on the "downshifted frequency" quite well. Just doing some quick math it looks like the beat frequency has to be stable to about 10ppb (parts per billion) to get the kind of frequency downshift needed.
Whilst the BFO plays a role in establishing the relationship between the real-time signal and the "time expanded" version, it does not act directly on the signal. Instead, there is a harmonically linked, sub-sampling system that analyses the "UWB" signals. The reason for this is that a pulsed laser cannot be fired fast enough to be considered a continuous signal. Instead, it has to be treated as a string of very widely spaced events. In order to keep the temporal link between these events, both the base oscillator (that fires the laser) and the mixing oscillator (that shifts the return signal) have to be supremely stable.
In contrast, the system that calculates the "span" of the time expanded signal works directly with the beat frequency (or a low order, even harmonic) because measurements can be made at the much higher oscillation frequency.
If this is starting to make sense to people then I'll try to find some more references based on RF theory. As I have discussed with prof_braino, one of the difficulties in describing the timer in terms of "frequencies" is that it was originally designed in terms of "time" only. This is because many comparable systems use analog ramps to perform ETS where there is no frequency component involved. Mathematically however, the equations work almost as well when based on frequency. The only anomaly that I'm aware of is that sometimes negative frequencies show up. For this design we would have to interpret this as meaning a mirrored or "time reversed" image of the signal rather than the usual RF interpretation of a lower sideband to the IF.
I thought it may be of interest to some of you to know how to design your own chips.
Custom designed chips are very powerful and can solve problems that are beyond the reach of ordinary microprocessors. One of the reasons for this is that the logic inside the chip can be designed to execute in parallel, not sequential like software instructions. You can think of this as like having thousands of processors running at the same time.
Most chip designs end up being a mixture of "combinatorial logic" (gates like AND, OR etc) and "sequential logic" (counters, processors etc). The method of designing these logic elements is very similar to writing software in that a high level, abstraction language is used - either VHDL or Verilog. These languages allow you to create complex gate structures with just a few lines of text, or, like assember, you can design gate by gate.
Getting your design onto silicon is also very easy. Depending upon the number of chips that you want to make you can use FPGAs (small volume), ASIC (medium volume) or custom fabrication (high volume). At this time, FPGAs are becoming more popular, even for high volume designs, because they can be developed very fast and then "programmed" and "re-programmed" on the final circuit board.
The chip vendors usually supply "development systems" for their silicon fabrics free of charge. Included in these development systems is a simulator that allows you to perform comprehensive testing of your design before "burning the chip". These simulators are increadibly accurate and take into account switching speed delays, internal track lengths, port pin drive capability and a myriad of other factors that affect chip performance. Once a design has passed simulation testing it will run on the real board.
One of the cool things about using an FPGA chip is that if you make a mistake on your PCB layout you can correct it by moving the pin assignments and functions around inside the chip - think of the chip as a reconfigurable pcb. In fact, it is quite normal to totally change your design over time without having to make a new PCB. This is why FPGAs are used in many products from cell phones to satellites.
So what can you do with your chip? Designs can be very simple, maybe a few gates that decode addresses or convert logic patterns from one form to another. They can also become more complicated, like interface controllers. For example, it is possible to use a single chip to add UARTS, SPI, I2C, ADCs, DACs, Ethernet, parallel ports, servo drivers, stepper motor drivers, camera interfaces etc to the Propeller. Chips can also be very sophisticated, incorporating multiple microprocessors, RAM, ROM, interfaces and custom logic. These are usually termed SoC (Sytem on Chip) because they can run by themselves.
Selecting a good chip fabric allows you to start with a simple logic design, say one AND gate, and then gradually expand your design by adding more and more features - same chip, same PCB. The internal logic can respond to signals of 300MHz or more and your design can use hundreds of thousands of gates if necessary. The DS00VQ100 chip uses 250,000 logic gates.
I think that young people wanting to make a career in electronics need to know three things:-
1. How to write software in C/C++.
2. How to design digital circuits in VHDL or Verilog.
3. The basics of analog circuits.
This knowledge is the foundation of most software and harware designs. Everything else can be built from this foundation.
As mentioned above, an important element of chip design is simulating the actions of the chip before committing to hardware. The first tests that I am doing on the DS00VQ100 chip are to make sure that the SPI bus works properly. I am using a simulator from Mentor Graphics. Both the chip design and the simulation files (test bench) are written in VHDL.
The picture below shows the results of a data transfer between the simulated chip and a simulated microprocessor. There is lots of detail provided in the simulation so you can see all the internal data states and the actions of individual gates as well as the signals on the pins of the chip.
Once the communication is working in the simulator, I can program an FPGA with the chip design and test it on a real board. I use a real processor with a real SPI port and transfer real data. I can no longer look inside the chip but the signals on the pins look similar to the ones in the simulation.
As part of the tests, I deliberately feed data with errors in it to the chip to see how it handles it. Exactly like the simulation I can tell that specified data format is the only one recognised by the chip and that errors in the data will not cause any hardware damage to the final LRF.
The content of this thread is ramping up to the sky, we've reached VHDL
ya'll take care
A phenomenon that is well understood in the field of radio frequency (RF) electronics is “mixing”. Mixing is the process of changing the frequency of a sinusoidal RF signal (Fsignal) by multiplying it with a different frequency from a “local“ receiver oscillator (Flocal).
The signal that comes out of the mixing process is actually composed of two parts, a sum frequency (Fsum = Fsignal + Flocal) and a difference frequency (Fdifference = Fsignal - Flocal). The lower, difference frequency component can be extracted using a low pass filter or the higher, sum frequency component can be extracted using a high pass filter.
Extracting the lower frequency component is sometimes called “frequency downconversion.”
Perhaps a less well known phenomenon is the preservation of phase information during the mixing process. This can be seen when two separate signals of the same frequency, but with a different phase, are downconverted using separate mixers but the same local oscillator.
For example, suppose two signals, A and B, are oscillating at 10MHz, but signal B has a 90 degree phase lag with respect to signal A. Each signal is fed into a separate mixer where they are mixed with the same local oscillator running at 9MHz. After mixing, the difference frequency of both signals will be 1MHz. Perhaps surprisingly, the phase difference between these downconverted signals remains at 90 degrees.
The consequences of phase preservation may not be immediately obvious, so let’s have a closer look.
Signal A is oscillating at 10MHz. Each oscillation takes 1/10^7 seconds = 100ns.
Signal B is phase shifted by 90degrees. This equates to a delay of 90/360 x 100ns = 25ns.
If we take the leading edge of each signal as an event in time, we can see from the equations that event B occurs 25ns after event A. Of course, these events are repeated many times every second but that does not alter the basic principle that each event on signal B is delayed by 25ns with respect to signal A.
So what happens to the time difference between these events after frequency downconversion? We know that the phase information is preserved, therefore:
The downconverted signal of A is oscillating at 1MHz. Each oscillation takes 1/10^6 seconds, or 1us.
The downconverted signal of B is shifted by 90degrees. This equates to a delay of 90/360 x 1us = 250ns.
We can see that a delay of 25ns in the original signal B has been changed during the mixing process to a delay of 250ns in the downconverted signal B. Mmm, I think we’re on to something here...
The principle of downconverting can be applied to non-sinusoidal signals as well.
Suppose signals A and B are square waves rather than sinusoidal waves. They have the same frequency as before (10MHz) and, as before, signal B has a 90degree phase shift with respect to signal A (a 25ns delay). If these square waves are fed into a mixer then the output will be a downconverted reproduction of the two square waves with the phase information preserved. This means that the leading edge of downconverted signal B will delayed by 250ns from the leading edge of downconverted signal A. The only requirement for this system to work is that the signal has a repeated cycle.
Since the phase of the leading edge of signal B is preserved during mixing, then the phase of the trailing edge of signal B is also preserved. In fact, the phase of any event that forms part of signal B will be preserved. This means that we don’t have to use a square wave or a sinewave for our signals.
Using this knowledge, let’s make a laser rangefinder.
Signal A is a short “spike” created every time a pulsed laser fires. Signal B is the return laser signal that has reflected off a target some distance away and been picked up by a photo-detector. There is a delay between signal A and signal B of 25ns. We know that the distance to the target can be calculated from the equation distance = speed of light x time / 2. The divide by 2 is to allow for the measured time being to the target and back again, the speed of light is constant, so all we need to know is the time.
In our laser rangefinder the laser is firing at 100kHz. In other words, it is a repetitive signal with a period of 10us. Since the firing is repetitive, we should be able to downconvert the signals.
We feed signal A (outgoing laser pulse) and signal B (return laser pulse) into two separate mixers. This time we will use a local oscillator running at 99kHz. The downconverted versions of signal A and signal B will have a frequency of 1kHz. They are now downconverted signals with a period of 1ms.
The conversion of the original 10us period of the signals to signals with a period of 1ms equates to a “timebase expansion” of 100:1. This is how much you will have to change the timebase on an oscilloscope to make the downconverted signals look the same size as the original signals.
The time difference between signal A and signal B has also expanded 100 times to 100 x 25ns = 2.5us.
Since we know that the phase and time locations of events are preserved during the mixing process, we can make timing measurements between downconverted events to work out the time difference between the original events. We simply divide our answer by the timebase expansion.
So, for a timebase expansion of 100:1, a downconverted duration of 2.5us equates to a real time duration of 2.5us/100 = 25ns. In other words, if we measure 2.5us between the leading edges of the downconverted signals, we can be sure that the actual time between those edges is 25ns.
By designing a circuit with extremely stable oscillators, we can create very large timebase expansions. Then we can use a low frequency timer to accurately measure events that are happening at the speed of light.
This system of oscillators and mixers is known as a “beat frequency oscillator mixer” (thanks to bkgable). By adjusting the frequency of the local oscillator, the amount of timebase expansion can be controlled. The DS00VQ100 chip includes all the circuitry required to perform downconversion and the timebase expansion of laser signals in a laser rangefinder (if it works!). The timebase expansion can be controlled from 200,000 times to several million times. At a timebase expansion 881,601 times, events at the speed of light appear to be happening at the speed of sound, making it possible to use a Ping)))™ timer on your new laser rangefinder...
I want to personally thank you for taking time and teaching me all the things I have either forgotten or am newly discovering. I am enthralled by the FPGA design and want to learn much more on that topic. Again thank you and I cant wait to get one of these for my robot project.
I would like to thank you for your explaination too.
I learned something new today. So the day wasn't a complete waste
Bean
I knew the part about 1 degree of phase at RF giving 1 degree at the down converted frequency but with "time expansion". But I did not know that this applies to a down converted pulse train as well as sinusoids. I guess the pulse train spectrum is down converted and preserved in the time domain. And averaged over a noisy LO.
A couple questions:
I assume the second mixer with 90 degrees of phase shift is for convenience of the measurement and not part of some Inphase/Quadrature calculation?
Are the local oscillators sinusoidal or square wave?
Are you depending on the edge switching on the FPGA being faster than the clock rate? You mentioned LVDS earlier.
Let me see if I got this: The laser signal is send (and the return signal received) at precise frequency. This is combined with a second slightly different but equally precise frequency, to produce a beat frequency. By making the two frequencies very close, we can generate a very slow beat frequency, and can make it in a range our micro can easily work with.. The beat frequency preserves the characteristics of the original frequencies. Since phase information is also preserved, we can now look at the phase information from the original sent and returned signals. The phase information is used to determine distance.
bkgable,
For sure. An interesting area of research is UWB (ultra wide bandwidth) positioning, where RF pulses are used instead of continuous waves.
Yes that's right. I only chose 90 degrees to make the maths easier to follow, there is no specific Quadrature Detection going on. The actual phase difference betweeen the outgoing and return signals will change as the distance changes.
In the explanation I discussed only the principle, not the implementation. The answer to your question depends on the type of laser and the type of mixer. LRFs that use FMCW (frequency modulated, continuous wave) use a sinusoidally modulated laser and a sinusoidal local oscillator. In the DS00VQ100 chip I've stuck to an almost exclusively digital design that uses a square wave LO generated from a TCVCXO (temperature compensated, voltage controlled, crystal oscillator).
In the DS00VQ100 edge speeds are important to preserve the spectral characteristics of the downconverted signals. However, for all LRF designs a more important issue than edge speed is the jitter on the LO signal. This determines the theoretical downconversion limit. I think I mentioned this earlier as one of the reasons why the clock on the Propeller micro wouldn't work well for downconversion. The Prop clock signal is produced by a PLL (phase locked loop) and they usually suffer from very high jitter. In fact, many micros deliberately add jitter to their clocks to reduce their spectral power which would otherwise cause RF interference and upset the FCC. It makes them useless for downconversion.
prof_braino,
Yes, that's right. Most of them use a low power, FMCW laser aiming at a reflective target to get a strong signal for good accuracy. I think that you would be surprised how simple their downconversion circuit can be.
Correct - a very good description.
Not quite. The beat frequency provides the timebase for downconversion but it is the mixer that preserves the characteristics of the original signals. You may be able to improve on the understanding of this statement by considering that the term "mixer" is synonymous with the term "sampler". It depends on the circuit design as to which term you're most comfortable with. As mentioned previously, the DS00VQ100 uses a "sub-sampling mixer" which is possibly the most confusing description of all.
Correct.
Just keep in mind that in the DS00VQ100 chip the phase information cannot be measured directly as a phase angle. Instead, a reference output that clocks once every 360 degrees is provided along with the downconverted signals. The relative phase of downconverted events can be measured using an ordinary timer that starts when the reference signal goes high and ends at the event of interest. The period of the reference signal must also be measured, and the ratio of the two times (Tevent / Tref) gives the phase angle. This is called "direct-digital phase measurement".
To convert this timing/phase information into a distance, just multiply by the range:
Distance to event [m] = (downconverted time to event / period of reference) * range [m]
Just an amusing anecdote - I wanted to know what the lowest acceptible clock speed was that could still give a reasonably accurate distance result. By applying maximum downconversion and displaying the signals on an oscilloscope screen I was able to use a stopwatch ...
So, if we wanted to, we could down convert to audio range, and send the signal directly to an audio amplifier, an output our distance as pitch. This would be a useful experiment in verifying the hardware is functioning before we add the micro processor, in addition to allowing blind people to accurately perceive distances.
The downconverted frequency doesn't change with the distance to the target, only the relative phase.
However, the timing is certainly easy enough for a micro to create the audio effect you mention. I've seen a pair of glasses made for blind people that does precisely what you're suggesting (very expensive) and I've worked with the local society for blind people at finding a cheaper solution. The problem that came up was that blind people rely heavily on their hearing so they don't like extra noises interfering.
Seems like your chip might be able to be used for an RF X,Y positioning scheme. Send out a very short RF pulse to a cooperative receiver that has a delay line before sending out the pulse back. Switched RX and TX. With 2 of those I get X,Y positioning for my autonomous around the house rover. Probably quite a few things to be considered though. Like UWB RF LNA and PA chips. Can you make your laser diode driver EMI noisy? And a switched pulse driver for the receiver like the transmitter?
I need a combined Hokuyo LRF and cm short range positioning. And of course no more than the $130 I spent on John Grands LRF.
The chip will available for sale once it has been tested in the LRF. I'm waiting for one more PCB - there is still a holdup with the Propeller. Without making any promises I would say before that before the end of the year it should be ready. This may seem like a long time to wait but I need to verify every aspect of performance before I can finish the data sheet.
The chip has not specifically been designed for this application although the principle of high resolution timing is part of a positioning system of this type. The main reason that I have avoided RF UWB is because it is a minefield of patents and litigation. I think it will be another 20 years before low cost "location" systems become commercially available, not because of the technology, but because of licensing restrictions.
The power supply module is now complete. I have done some preliminary testing and the results look good.
The module has four output voltages:
1.5V DC - powers the core of the DS00VQ100 chip
3.3V DC - supply to the receiver amplifiers, the Propeller chip and all other I/Os
7.8V DC - main power to the laser
Programmable HV - bias for the APD
The first three rails have been tested but the final one will take a bit longer to complete.
The design specification was that the LRF should work from 4.8V batteries. Actual results show optimal operation from 3.9V DC to 7.6V DC.
There is an auxiliary power input from the USB port and this also works fine. The idea behind this particular module is that for testing and programming purposes the LRF gets power directly from the USB port. Once everything is working fine then it can be connected to a battery. If both supplies are connected at once the unit runs from the higher voltage.
The processor module is complete and basic tests are done.
In the picture the processor module (top) is plugged into the power supply (bottom).
The design of the processor is based on a typical Prop prototype board. There is a USB interface for programming, 64k EEPROM, some LEDs, an external connector etc. The main purpose of the processor board is to communicate with the DS00VQ100 chip. This communication is in the form of a SPI bus as well as direct connections to the time expanded signals.
The reason for using a SPI bus is that it is a common protocol found on most microcontrollers. By removing the processor board you can get direct access to the pins of the SPI bus and connect another type of processor if you want. I have tested both the Prop and the Arduino and both work just fine.
There is still some software to write for the Prop but my focus for now is on getting all the hardware running. I'll do this by writing test routines that check out each hardware function. Once the hardware is running I will take the software test routines and re-package them into a fully working sysytem.
To keep things simple I'm only working in Spin, PASM and C/C++ for now. When the system is fully operational I will bring in the other languages. The reason for this selection of languages is two fold:
1. Spin and PASM are at the opposite ends of the speed spectrum. If the LRF design works with both of these languages then speed will not be a constraint for someone else writing their own code.
2. I'm using the C/C++ of the Arduino to make sure that the hardware performs just as well with any processor. The Arduino has a hardware SPI port so this makes both the software and hardware very different from the Prop. This is a good test of the LRFs interface protocols.
Keep sharing your great design work as it progresses.
The photo shows the stacking arrangement in a bit more detail. The bottom board is the timer board which carries the DS00VQ100 chip, the middle board is the power supply and the top board is the processor. All headers are dual row, 0.1" pitch and are green in the photo. The signals travel in a zig-zag pattern between the boards so that stacking can continue indefinitely. The next header is on the processor board (not populated) and is to the left. The standoffs are 3mm type with a male thread at one end and female at the other. The yellow row along the bottom edge is test points connected to the DS00VQ100 chip so that real time and expanded signals can be seen on an oscilloscope.
Testing of the timer module has started. This is a simple board form a layout point of view but it has many functions, each of which has to be checked carefully.
To start with, I programmed the FPGA with a dummy design that smply toggled all the port pins at preselected frequencies. By following the signals with a 'scope I could check that each chip pin went to the correct pin on each header.
I almost blew up the high voltage power supply during this test. I had forgotted that it was connected to a pin on the chip and it starting creating hundreds of volts as soon as the test design started running. It is supposed to be controlled by a circuit in the DS00VQ100 chip, but of course, the circuit wasn't there... :blank:
Just finished testing the programmable, high voltage generator for the APD bias. It easily reaches 200V DC and it will go well over 250V for high breakdown APDs. Control is via an 8 bit register giving an adjustment resolution of about 0.8V at the design voltage of 150V DC. This should be adequate for reasonably good noise control on the APD. The efficiency looks really good. Producing 150V DC the HV generator draws less than 10mA at 5V input. This efficiency is partly because the circuit uses a high quality inductor - always a good idea with a switch mode power supply.
Timer Module - update
I've also been testing the resolution of the beat-frequency-oscillator-mixer. The limiting resolution is determined by the frequency stability of the TCVCXO's (temperature controlled, voltage controlled, crystal oscillators). Over a period of several minutes the timing stability (without a software control loop) was better than ±2cm equating to a frequency stability of around 4ppb (parts per billion) which is better than expected. I think this is because the temperature is very constant and the circuits are running cool. Once in the field a software control loop will be needed to compensate for temperature changes.
Under the test conditions the timing resolution was ±0.5cm. If you tried to design a high speed timer to directly measure the signal with this precision it would need a clock frequency of 30GHz.
The equivalent time expansion was over 2.5 million times.
Next step - fire the laser...
Catalina is RossH's C compiler for the prop. It might be interesting to see if the same C code ports over.
http://forums.parallax.com/showthread.php?135039-Catalina-3.3