PLL Reliability
I noticed from browsing the Prop forums that PLL failure is mentioned many times.
As we are considering using the prop in a new design I would like to get some statistics from parallax about this,
Thanks.
As we are considering using the prop in a new design I would like to get some statistics from parallax about this,
Thanks.
Comments
Now, as with any device, if you go out of spec or abuse it something will fail. It's just that with the Prop the PLL seems to be the thing that fails first so it gets all the attention. Really it is as rugged as any other device. Perhaps more so.
Of course if you are really serious about high reliability systems you will demand mean time between failure (MTBF) specifications from Parallax. As yet I have not seen such specs in any data sheet. I would suggest pursuing that with Parallax Semiconductor in that case.
Anecdotally, myself and others have lashed up Props to bread boards willy-nilly, paying little attention to layout decoupling power supply etc, many times, with out any issues. Most failures seem to be attributable to abuse of I/O voltages and such.
Decoupling caps and device used within spec are a given.
I would still like to get the "official" response to this question though.
I have worked/Experimented with Propeller and never had problem's with PLL up to 15MHz PLL8.
(Over-clocking with standard Voltage with ambient temperature 0 to 40C)
Only problems that I have read on was People that use 40 pin dip package in Bredboard with insufficient wire else omitted some Voltage wires. And even omitted Decoupling/Bulk capacitors.
As Propeller can have very big differences IN curent consumption it needs for Voltage stability AT last one Bulk capacitor as near voltage pins on XTal side as possible.
I wouldn't worry about it if you stay within the Prop's specs.
But if you do want to treat your Prop badly, just use an external oscillator instead of the PLL. Then, it could stand up to more abuse.
BTW: Parallax is on the West Coast, so you'll have to wait a while until they get out of bed...
I'm sorry to intrude but when you said "Bulk cap", you mean 1uF?, 10uF?
You NOT intrude at all.
As Mike said --> 10uF. Usually 10 to 33uF.
Small ones Mice describe are to suppress AC bursts on top to DC to/from IC' Power traces.
Bulk (10-33uF) to hold reserve current for IC with very fast swings in power consumption (Propeller are that one).
I think Heater said it pretty spot on:
Rayman also said something that I think is very true as well:
Recently, I asked Beau Schwabe about the PLL failing. He said that the most common cause is due to not powering all four (for QFP and QFN packages) or two (for the DIP package) power rails on the chip. Slight variation in voltage on the chip's internal power planes causes internal heating, which is a PLL's enemy.
Bottom line: stick within the Propeller's absolute maximum parameters and you will have a very reliable processor.
I suppose this is a good segue into MTBF/MTTF. We recently had a customer contact us for some information about the Propeller so that he could estimate MTBF. The estimation depends greatly upon operating conditions and the model for estimation being used. This customer was using the MIL-HDBK-217F-2 specification. I contacted Chip about the required metrics and he verified the estimation as per the model's given table values and the Propeller's design characteristics. The following is that info, though I would like to reiterate that this is just one particular model's estimate for MTBF.
Handbook which contains specification (look at section 5-3):
http://snebulos.mit.edu/projects/reference/MIL-STD/MIL-HDBK-217F-Notice2.pdf
Using those formulas, values in tables, and some Propeller design metrics, the formula estimates approximately 109 failures per million hours.
Again, I would like to say that this estimation is based off of a formula that uses some canned values and a few design metrics. I think a more accurate value could be obtained from the fab facility. They have invested serious time and money to properly estimate reliability for the particular process they used.
Thank you for reading all of this. If I happened to mis-state something, feel free to call me on it
-Daniel
Thanks for the info.
What Is the recommended PCB trace layout for the QFN part, your documents to not appear to have this information.
Hi Batang,
We show a recommended land pattern and stencil for the P8X32A-M44 (44-pin QFN) on page 35 of the Datasheet.
Is this what you were looking for? If you are looking for more of a reference design layout with additional components, then I would suggest possibly taking a look at the PropStick USB (although it may be a tighter form-factor than you may be looking for). http://www.parallax.com/Store/Microcontrollers/PropellerChips/tabid/142/ProductID/411/List/0/Default.aspx?SortField=ProductName,ProductName
I only use 2 layer pcbs. I pour separate planes under the prop chip. The ground is under the chip (component/top side) and power is on the underside. The bypass and bulk capacitors are under the prop chip on the power plane. Then I connect those planes to the standard pours where ground is on the underside and power is on the topside. By hand routing, I ensure the bulk capacitor is directly on the power feed to the prop alone (sometimes with the eeprom) to maximise its effect for the prop.