Propeller 2, 64 threads?
william chan
Posts: 1,326
I heard some rumours that each Propeller 2 cog will be able to run 8 threads of 20MIPS each.
Is it true?
Can we utilize one thread for uart, one thread for keyboard, one thread for mouse, one thread for joystick and so forth?
Can "thread objects" be made for such purposes?
Is it true?
Can we utilize one thread for uart, one thread for keyboard, one thread for mouse, one thread for joystick and so forth?
Can "thread objects" be made for such purposes?
Comments
-Phil
Yes, it's all done in software, but Catalina can run multiple C threads from Hub RAM. One of the Catalina multithreading demo programs (included below) runs 170 threads on a single cog. The limiting factor was that at 170 I start to run out of Hub RAM. Catalina could run many more threads if I didn't have to load display drivers etc.
Ross.
-Phil
That's how threads are used on XMOS devices. They usually support one peripheral function, like Propeller cogs, but that isn't necessarily the case.
XMOS has a large number of patents on their technology, Parallax needs to check for any infringement.
Leon, you are a loon!
XMOS has a patent on multithreading? Give me a break!
Ross
I didn't just mean hardware threading, anyway; there might be other items. With all the patent litigation going on at present, it pays to be careful.
I am sure they have not.
You can find the three patents belonging to XMOS here http://www.patentbuddy.com/Company/Profile/XMLCITIES-INC/207399
They are all hardware related. I don't much like how the patent system is going and I hate the idea of software patents the most. I think I can tolerate these patents though.
One of them is to do with compact instruction set decoding.
Two of them are to do with the tight integration at the hardware level between the I/O ports on a system and the hardware thread scheduling in the CPU.
Not at all bad.
David May has a bunch of other patents as a result of his long research career, no idea if they are relevant or not.
This poses a bit of a paradox. XMOS has a catch phrase "software defined silicon" which encapsulates the idea that any logical function you care to perform can be done in hardware with a bunch of gates or in software on a CPU. Given enough speed.
Ergo, any patent on the description of a digital circuit is equivalent to a patent on a software algorithm. Which can be shown to be the equivalent of a piece of mathematics.
Mathematics is not patentable. In many places software is not patentable.
Ergo, digital logic designs and concepts should not be patentable either.
Heater,
We both know (as should anyone who has ever dealt with patents) that holding a patent is one thing. Being able to enforce it is quite another.
Anyone who thinks XMOS can enforce a patent on multithreading is a loon!
Ross.
Leon, I don't care what anyone says - you are an endless source of amusement!
Ross.
Indeed, it helps to have big piles of money and lawyers. That's one of the crazy things about the patent as intellectual property idea. In the world of real property, say my garden or my car, the law says it's mine and the law might even offer me some protection from trespassers, thieves etc etc. Not so with IP where there is no protection for the little guy.
I don't know, RAMBUS and such have managed to do such things. XMOS has some money and lawyers I'm sure.
An interesting discussion indeed.
Presently, on the Prop1, we can already run 144 simultaneous assembler threads of a trivial nature in each cog .... flashing LEDs. So a total of 1132 threads.... a totally useless exercise with 32 I/O pins.
For real work, the number is a more practical 6 to 8 threads per cog, depending on each thread's needs. Afterall, the cog has a finite amount of processing power. And those would run at full speed when active, with a timing granularity of 1 uSec, and a task switch time just under one uSec. The threads are relatively independent of each other from a timing perspective, but totally code independent of each other. However, they do need to be written in a co-operative manner to interface with a tiny software Scheduler kernel.
With the Prop2's pipeline architecture and higher speed, as well as whatever new clever instructions, it should be quite a spectacle. Seriously looking forward to that.
Cheers,
Peter (pjv)