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Prop II: Speculation & Details... Will it do what you want???

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  • PublisonPublison Posts: 12,366
    edited 2011-05-03 17:55
    Chip,

    Thanks for letting use know you are still alive :tongue:

    Looking forward to a new die pic. Sounds like trying to fit 10 pounds of stuff in a 5 pound bag.

    cgracey wrote: »
    Beau will hopefully post a picture here soon of the current die.

    It is already as big as the package it's going into allows. There is a huge DAC bus going around the interior of the I/O pads with all the memories located within that ring. What's left in the middle, you'll see, is where the million gates of synthesized mish-mash have to go. You'll see four big RAMs that are 32KB each. We need to implement them in sets of four because of the architecture. There is no room for another four of those blocks, so 128KB is all we are going to get into this TQFP-128 package using a 180nm process.

    We are anxiously waiting to hear from the synthesis guys if the logic will even fit into the open space reserved for it.

    There are 4,595 ports coming out of the synthesized block that must attach to the memories and I/O circuits. The synthesis job will probably take 2-3 weeks, as opposed to what was shaping up to be 2-3 years of schematic and layout work.
  • localrogerlocalroger Posts: 3,451
    edited 2011-05-03 18:11
    RossH wrote: »
    Seems an appropriate day to say ...

    May the FORTH be with you!

    But beware crossing over to the the dark side of the FORTH. Of the FITH lords there can be only two, one the master and one the apprentice, and since the stack only can hold one value one of them is always popped.
  • RossHRossH Posts: 5,388
    edited 2011-05-03 18:15
    localroger wrote: »
    But beware crossing over to the the dark side of the FORTH. Of the FITH lords there can be only two, one the master and one the apprentice, and since the stack only can hold one value one of them is always popped.

    Never fear - we will be saved from the dark side by that cute little droid P8X32!
  • localrogerlocalroger Posts: 3,451
    edited 2011-05-03 18:54
    RossH wrote: »
    Never fear - we will be saved from the dark side by that cute little droid P8X32!

    Aw, he's so cuuuute... WAIT A MINUTE IT'S GOT ROCKETS UP ITS BUTT?

    OK, not rockets, PLL's. PLL's. I just gotta keep breathing and repeating that to myself.
  • richaj45richaj45 Posts: 179
    edited 2011-05-03 18:59
    Ken Gracey wrote: »
    Opportunity for clarification has arrived.

    Rich, the design methodology was a limitation for achieving the Propeller 1, but we've now ported the Propeller 2 (may be only a code name for now) design to HDL and we are working with a design center who will run the synthesis so we can fabricate the die. You know more about this than I, but my understanding is that we can skip the lengthy schematic layout process. Our focus will become testing, characterization and tools. The end result, and our goal, is to be able to release chips more frequently than once every five years. This is a business necessity.

    Given the R&D expenditures, fixed cost of shuttle runs and testing setup, it isn't likely to create a positive net income from hobby and niche products alone. Volume sales can't be just a desire or side-effect, but must be a focus of Parallax Semiconductor.

    Ken Gracey

    Ken:

    Thank you much for taking the time to answer me.
    Forgive me for being ignorant of the newer methodologies parallax is using with Prop II.
    I hope the best for the project and the company.

    One other thought.
    I have been one that had thought more program memory for each COG would be better. However i understand the 32-bit nature of the instructions and the fixed literal bits in the instructions to access more memory.

    So i was thinking of two ideas to be compared to each other. That is one or the other and maybe you could tell me what you think.

    1)
    Expand the COG memory to 40-bits wide. which would make available 4-bits for each coded source and destination address or 13bits or 8k 40-bit words of COG space.
    The challenge is to fit that into a 32-bit main memory but not much to my way of thinking.

    2)
    Keep the COG memory as it is, but expand to 16 GOG. Maybe that would actually give more ability to the Prop than expanded memory for each COG. The reason i say that is people have done such amazing things with this chip that i think it is because of independent COGs being able to address, without interruption, one small part of the whole problem.

    In other word, from an abstract what if point of few, would more COG memory produce greater programming power or just more COGs?

    Thank you much for the bandwidth.

    cheers,
    rich
  • Roy ElthamRoy Eltham Posts: 2,996
    edited 2011-05-03 19:22
    I do wish we could have more than 128K hum memory, but the "built in" support of SDRAM and the extra I/Os can solve most problems assuming you are ok with the extra parts for external sdram. The memory bandwidth sounds like it will be high enough for most uses, and an XMM setup on the Prop2 will be able to run pretty darn fast.

    It would be really nice if Parallax (or gadget gangster or someone else) would sell a Prop2 Proto Board with a decent chunk of SDRAM mounted, or had a "addon" board with the SDRAM that could be easily connected.
  • edited 2011-05-03 19:25
    I once asked my boss. "How much is enough"?

    His answer... "just a little bit more".
  • Bill HenningBill Henning Posts: 6,445
    edited 2011-05-03 19:55
    Gee, I wonder who beside GG and Parallax will be doing something like that????

    But I need working silicon first :)
    Roy Eltham wrote: »
    I do wish we could have more than 128K hum memory, but the "built in" support of SDRAM and the extra I/Os can solve most problems assuming you are ok with the extra parts for external sdram. The memory bandwidth sounds like it will be high enough for most uses, and an XMM setup on the Prop2 will be able to run pretty darn fast.

    It would be really nice if Parallax (or gadget gangster or someone else) would sell a Prop2 Proto Board with a decent chunk of SDRAM mounted, or had a "addon" board with the SDRAM that could be easily connected.
  • Cole LoganCole Logan Posts: 196
    edited 2011-05-03 20:01
    You know thats one thing that I definitely won't be worrying about. I figure once the design is finallized there will be boards designed and by the time the chips ship there will be at least one person with a fully populated board just waiting on the chip to arrive.
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2011-05-03 20:14
    Why wait for the final word? I already have two boards made for the Prop2 (and if I have to modify them I will), based purely on the info we have on the forums.
  • Beau SchwabeBeau Schwabe Posts: 6,552
    edited 2011-05-03 20:30
    All,

    As Chip mentioned, the die is already as big as the package is going to allow. The 32k x4 RAMs are located at the top with some control logic in the middle. The "COG guts" consist mostly of the PLLs COGRAM and DUAL-Port RAM in addition to SIN ROM and CORDIC ROM. The area left for synthesis is just over 9.6 million square microns allowing 1.2 million square microns for the remainder of each synthesized portion of the COG.

    I have included two DIE views, for clarity as to where things are the 'frame' view only shows a hierarchical block name representation.
    1024 x 781 - 170K
    1024 x 781 - 111K
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2011-05-03 20:43
    Beau, and Chip:
    Thank you very much. Once again you are going beyond the call, to provide us with more information on the Propeller II than most manufactures would release about there old discontinued ICs.

    It is things like this that assure that I will forever be a Parallax customer. How did I get along with the inferiority of other companies for so long?
  • jmgjmg Posts: 15,155
    edited 2011-05-03 20:43
    All,
    As Chip mentioned, the die is already as big as the package is going to allow.

    A die that large, is indicating quite an expensive chip ? - How does it compare with the Die area of the Prop 1 ?
  • davidsaundersdavidsaunders Posts: 1,559
    edited 2011-05-03 20:55
    I will be using 24 Prop II cogs, on one device, to there full potential with in 2 days of my order being filled (which will be placed the day that Parallax announces the release of the Propeller II).

    Since it was said that Parallax intends to reduce the time between Propeller versions:
    Is the Propeller 3 going to have 16+ cogs?
  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2011-05-03 21:07
    What has helped my programming more than anything else is a philosophy of building and testing one step at a time. Constant testing is the key.
    The biggest mistake a programmer can make is to write an entire program before testing it. Then -- yeah -- he better have good debugging tools and an extended deadline.

    -Phil

    Phil, that's also the way I write code.
    I create test code and test everything as I go along.
    At each new step I run all the test code again to make
    sure nothing funny is going on. I never ever write a bunch of
    code and then just hope it works at the end. that's a recipe
    for disaster! ... a recipe for things like the infamous Zune Bug :-(
  • RossHRossH Posts: 5,388
    edited 2011-05-03 21:20
    I have included two DIE views, for clarity as to where things are the 'frame' view only shows a hierarchical block name representation.

    Hi Beau,

    You had some errors in your diagram - but don't worry, I have fixed it for you:

    DIE_frameview_04_03_2011_fixed.jpg


    Ross.
  • edited 2011-05-03 21:54
    The perception around an IVY league campus I visited is that all microcontrollers do about the same thing. I'm not saying their perception is right but that is what some of them believe.

    I think some of you would really like to see the Prop on a larger scale that would compete with some of the retro computers. I know that some of you are using the prop in ways that push the hardware to its extremes.

    A segment of the users want a more fat Propeller like computer chip so if you let your voices be heard, maybe someone at Parallax can make it happen somewhere down the road.
  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2011-05-03 22:01
    RossH wrote: »
    Hi Beau,

    You had some errors in your diagram - but don't worry, I have fixed it for you:

    DIE_frameview_04_03_2011_fixed.jpg


    Ross.

    LoL!
    Now you have done it, I'm thinking up all sorts of funny legends to
    put on that die image :-)
    We could have some fun with this...would have to enlarge the image
    to allow for more detailed explanations of the various areas.

    Funniest image should win a Quickstart board :-)

    Something like these funny brain diagrams...but legends suited to a uC.
    images?q=tbn:ANd9GcTwyo6Y_v8CBwyxAOKyH2T1BwVPLfjSO9-Tf5YavV-uf5BHldfS2A
    images?q=tbn:ANd9GcTnJMeUI-YFB-3eoWrWo9GyE5y1VfAl73iQdLPLwYW9abnreu4K
    mapping-of-the-cat-brain.gif
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2011-05-03 22:07
    Oh cripss, Holly, don't let Humanoido see this! Who knows what his Big Brain might morph into if he does!

    And, yes, the CAT BRAIN is an exact representation of Browser's gray matter!

    -Phil
  • AribaAriba Posts: 2,685
    edited 2011-05-03 22:44
    Since it was said that Parallax intends to reduce the time between Propeller versions:
    Is the Propeller 3 going to have 16+ cogs?

    I hope they do first a downsized version of the Propeller II.
    For 99.5% of my Propeller applications I do not need 96 I/O pins, but I would like to have the speed and all the I/O features of the Prop II. I think there is big market for a little Propeller with only 20..28 pins and something like 16 I/Os, 3..4 cogs and 16..32k HubRAM. The die size can be 1/3 of the Prop2 because also the I/O space for 80 pins is not needed. Therefore the chip should cost max. 1/2 of the Prop II.
    With the new features of the I/O pins (ADC, DAC) we need only 1 pin for TV, only 5 pins for VGA and an ADC needs only 1 instead of 2 pins, so 16 I/Os will be enough for many applications.
    It would be the ideal chip for measuring some sensors and communicate over a fast bus (USB, Ethernet without additional chips).
    And with such a low pin count, even a DIP package is possible!

    Andy
  • Beau SchwabeBeau Schwabe Posts: 6,552
    edited 2011-05-03 23:25
    Ariba,

    If it were only as simple as removing a few (several) pins to alleviate some space. You still need a buss to communicate to what pins do still remain.

    There are basically three scenarios that happen when designing a Chip.

    1) you are PAD limited - Means that your I/O Pads are as physically close together as they can be for how many I/O's that are required in your design. This leaves extra space within the core.

    2) you are Core limited - Means that the internal layout guts (the Core) is so packed the the I/O's need to be bumped out to compensate for the room. This leaves extra space between the I/O's

    3) you are DIE limited
    - Means that the I/O's are pushed out to the furthest boundary allowed by the process (within a DRC of the scribe lines ... happens to be 50 microns).

    The category that we fall under is DIE limited which means for the current 128 pin package the DIE is as big as the manufacturing process will allow. A different package would be cost prohibitive. We are close to #1 and #2 but at the moment #3 is the determining factor.
  • RossHRossH Posts: 5,388
    edited 2011-05-04 00:08
    Since it was said that Parallax intends to reduce the time between Propeller versions:
    Is the Propeller 3 going to have 16+ cogs?

    Much better than that! I hacked into Beau's computer while he wasn't looking, and guess what I found! - a preview of the Propeller 3!!!:

    DIE_frameview_04_03_2011_Prop_III.jpg


    Ross.
  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2011-05-04 00:30
    That's pretty good RossH :-)

    My uC chips must already have one of those Random Bug Generator
    sub units....
  • RossHRossH Posts: 5,388
    edited 2011-05-04 00:44
    That's pretty good RossH :-)

    My uC chips must already have one of those Random Bug Generator
    sub units....

    Yes, many other uC manufacturers have had these for a while. Parallax didn't have enough space to include one in the Prop I, but the newer manufacturing process means they expect to be able to squeeze one in on the Prop III.

    Ross.
  • Cluso99Cluso99 Posts: 18,069
    edited 2011-05-04 05:02
    Ross: I see a bug in your PropIII. The top second left box does not do a reset. It turns on the VGA to output a blue screen and lockup!

    Chip & Beau: Thanks for your feedback. We will just have to live within 128KB hub. Hopefully I will be the first out with a PropII & SRAM :)
    There are a lot of other goodies in there... Guess we just got carried away with cog counter and IO requirements and hub ram suffered.

    So when can I have one ????
  • RossHRossH Posts: 5,388
    edited 2011-05-04 06:03
    Cluso99 wrote: »
    Ross: I see a bug in your PropIII. The top second left box does not do a reset. It turns on the VGA to output a blue screen and lockup!

    Yes, you're right - we didn't have enough space for the necessary BSOD Eliminator circuit.

    Perhaps we could leave out the Cylon Sound Effects? ... Nah! - who'd want to buy one without that?

    Ross.
  • dr hydradr hydra Posts: 212
    edited 2011-05-04 07:01
    Ken and Chip

    Thank you for your replies...I cannot wait to get 1, 2, 50 propeller IIs...My only concern is the chip size (lack of DIP). Parallax is planning on making prototype boards...right?
  • Ken GraceyKen Gracey Posts: 7,387
    edited 2011-05-04 07:08
    dr hydra wrote: »
    Ken and Chip

    Thank you for your replies...I cannot wait to get 1, 2, 50 propeller IIs...My only concern is the chip size (lack of DIP). Parallax is planning on making prototype boards...right?

    Certainly, dr hydra. We'll make sure the chip package pins are accessible in a variety of formats.

    Ken Gracey
  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2011-05-04 12:59
    dr hydra wrote: »
    My only concern is the chip size (lack of DIP).

    Yes, I often like DIP with my chips too :-)

    Time for everyone to get a hot air rework kit, some solder paste and a small fridge
    to keep their paste in. Those tiny peltier coolers are really nice and fit right on your
    bench.

    Someone should make a video showing how easy it is to solder and remove the new
    PropII using a cheap rework station (like the Atten 858D) something along the lines
    of the sm soldering videos at SparkFun.
    Atten 858D review --> http://www.youtube.com/watch?v=vva2t21sOAs&feature=feedu

    Some simple board designs with the gerber files so newbies can get their feet wet
    ordering custom boards and getting their propII soldered to it and working would be nice.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2011-05-04 13:27
    I love the DIP 40s because I can try 100 different things with my 5 Prop1s. I hope that there is to be a way to swap the couple of Prop2s, I hope to get around in various experiments.

    So far there has only been one of my Prop1s that has been definately nailed down, hopefully never to be removed again, and that is the one in the Keyboard pretending to be a Dracblade. I know, this task could be so replaced by a Prop2 on its own.

    I have recently tried to steam off some SDRAMs from a DIMM, whilst I cannot be sure that there isn't another problem it didn't seem to suffer this and another solder down ( I did try a couple more, but then the homemade PCB started to suffer too).

    So without a plug and go system the Prop2 will end up being a chip that is viewed as being "to valuable to be used".

    Prop1.5 (pretty please?)
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