WORKING Propeller based ATA.
davidsaunders
Posts: 1,559
Here is a working and tested ATA implementation for the propeller. I am using a closed source driver at this time so I can not provide a driver. The HW is 100% open source. This follows most of the rules, though all I can say for sure is that it works great on my breadboard with a good selection of different HDDs.
You WILL need to add level shifters of some form to go between 3.3V and 5V. Also this schematic matches its breadboard test. I would have posted this first, though I had not yet tested it, now it is tested.
The pin numbers have changed. Also with most devices the diode can be omitted, just helps some picky devices.
Many, many thanks to jazzed for getting this into an easily readable form.
For more help on using ATA see http://wiki.osdev.org/ATA_PIO_Mode . Though do remember that we are multiplexing the ATA Data lines down to 8 bits.
You WILL need to add level shifters of some form to go between 3.3V and 5V. Also this schematic matches its breadboard test. I would have posted this first, though I had not yet tested it, now it is tested.
The pin numbers have changed. Also with most devices the diode can be omitted, just helps some picky devices.
Many, many thanks to jazzed for getting this into an easily readable form.
For more help on using ATA see http://wiki.osdev.org/ATA_PIO_Mode . Though do remember that we are multiplexing the ATA Data lines down to 8 bits.
Comments
I can draw an equivalent schematic quickly with Eagle. If I knew diptrace, I'm sure that would be just as fast, but I don't know it and it would take me a while to learn it. The slowest/hardest part about schematic capture, etc... is making new components.
If anyone, that can do so quickly, wishes to redraw the above schematic with a software tool, so that it looks better and is easier to read; I will gladly replace the picture of my schematic with the improvement. The posted schematic is a bit condensed to fit on one page and be accurate, my main schematics are always drawn out for every lead.
Another option I use is Paint. By having pre-drawn symbols and blocks it is just a matter of cutting, pasting, and using lines to interconnect things. Having color available is also very helpful.
Some questions though:
Why are you using HCT parts? LVC parts have much better characteristics.
What devices are used to drive IORDP and IOWRP?
-Phil
And on the drawing I hope this is better:
And I completely agree on pencil and paper. They are always there, never fail, and endure for many years without worry of format changes, fickle storage, or enabling technology.
(I do print out source code for that exact same reason. 6809 / 6502 code I wrote in the mid-80's is still there, easy to use, readable, with few worries. The stuff I had on disks?? Let's just say I'm glad I either wrote it down, or printed hard copy)
[removed, cranky today, it seems!]
And, davidsaunders, 'sorry if I seemed to be picking on you. At least, if you've ever seen Bob Pease's schematics in his Electronic Design columns, you'd know you were in august company. Here's an example from his Jan. 6, 2011 column:
I do recommend taking the time to become proficient with an available schematic CAD tool, though. Someday, you may want to write an article or appnote, in which professional-looking schematics are de rigueur -- at least if you're not Bob Pease. The forum is a great place to practice those skills.
-Phil
Phil:
Thank you. I do need to be better about making sure the schematics are readable before posting. Also, thank you for the comic relief
Do you have a quick schematic with those level shifters? I'd be interested to see where you are using them, mainly because you might not need level shifters at all. Propeller output to 5V chips - use HCT and power the HCT from 5V and the logic levels work out correct. And for 5V input to the propeller, use 2.2k resistors.
Nothing wrong with level shifter chips mind you, but they consume a little more power and they add a little more delay.
The extra level shifters are only used between Prop P16-P18 and ATA address, and between P22 P23 and ATA RST, CS0, and CS1, All the other level shifting is done by the logic shown in the schematic, as all other signals pass through 74HCT series gates. Also I should note that, I use 74HCT244s as level shifters in cases like this.
Please review for errors. I didn't add * to active low signals. Forgot to change 74LS00 to HCT. There is no power supply or bulk capacitors.
Thank you.
I am impressed beings it only took an hour. Looking at the PDF, I see only one error, in the layout you show the pins you have hooked to Propeller P8 though P15 should be attached to Prop P0 through P7. Thank you, Thank you. I am not to much worried about showing the power supply, bulk caps, or decoupling caps as I would expect this to be part of a bigger circuit.
PropATAIDE.sch
jazzed:
I give my thanks, I could not have done this.
Yes, the LED will never work like that
Toby What do you mean? Most modern HDDs do not even have a Busy LED and rely on the controller for that, and if yours does then the HW described here should not effect it any differently than any other controller. Also this controller does not describe a busy LED.
The data is multiplexed. The LE on the incoming latch is only active if a read is in progress, and the OE on the outgoing latch is only active if there is a write in progress. I will look at it again in the morning, it is midnight here.
There is a LED with its cathode connected to VCC, on DDACK.
I'm probably confusing something, 4:00 AM starts never agree with me, but then it must be early hours for you too
The PropATAIDE.sch file attached to my previous post looks correct. Here again.
Sorry about that I just saw my error. Somehow Prop P0 through P7 got tied to Prop P8 through P15. I do not know how to correct this with Eagle, please HELP.
Did this do it?
The only thing that really bothers me now is both the IDE->PROP 74x244 and 74x573 are driving P0..7 simultaneously by the signal RDOE. Clearly that will not work. Any ideas?
Also, my signal names come from here: http://en.wikipedia.org/wiki/Parallel_ATA ... Is DDACK your DASP ? Please review other pins.