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Sweet-spot INA to HUB Byte Transfers (6MB/s or 48Mbit/s 1 COG @ 96MHz) - Page 2 — Parallax Forums

Sweet-spot INA to HUB Byte Transfers (6MB/s or 48Mbit/s 1 COG @ 96MHz)

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  • RaymanRayman Posts: 14,877
    edited 2011-04-22 09:39
    Here are the values:

    aFreq long $8000_0000/6+1000 'gives a clock cycle every 3 instructions
    aPhsa long $4000_0000
  • jazzedjazzed Posts: 11,803
    edited 2011-04-22 10:08
    Rayman wrote: »
    Here are the values:

    aFreq long $8000_0000/6+1000 'gives a clock cycle every 3 instructions
    aPhsa long $4000_0000
    aPhsa is consistent with what I've used.

    aFreq should be a power of 2 though since anything else risks producing clock jitter. I use $1000_0000 for 16 clock HUB access time. Since you reset PHSA every time through the loop, aFreq doesn't have to be perfect, but it should be jitter free.

    One thing to consider is moving the t5 pointer adjustment between "mov phsa, aPhsa" and the "mov t1, INA" instruction. That way you don't have to worry so much about setup INA timing. That would probably mean using a lower aPhsa value.

    One of my next projects is porting the Flash driver so Catalina can use it to fetch/execute flash resident X LMM instructions.
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