QFN Center PAD?
What is the Propeller QFN package center PAD?
Nothing is in the datasheet.
Is it ground/vss? If not what?
Is it not connected?
If not connected can it be connected to ground/vss?
Thanks.
--Steve
Nothing is in the datasheet.
Is it ground/vss? If not what?
Is it not connected?
If not connected can it be connected to ground/vss?
Thanks.
--Steve
Comments
-- Texas Instruments: sloa122.pdf
-- Freescale: an1902.pdf
-- Intersil: tb389.pdf
They do not say much about the electrical connection to the exposed thermal pad. It is more about thermal performance, which would of course be most important in situations where you expect to run the chip hot. In those cases, the recommendation is that 0.3mm (12 mil) vias on 1mm centers be placed through from the thermal pad to a large thermal (ground) plane. There are specific recommendations on how to implement the vias, the solder mask and the stencil pattern.
I don't run the chip hot, so I don't place any such vias, which simplifies the masks. But I do attach the pad to ground, and I have a matching pad on the bottom of the circuit board attached to Vdd, set off from a large ground plane. The idea of that is to make a nice high frequency bypass capacitor right under the chip. It would actually be easier to attach the thermal pad to Vdd, and have an unbroken ground plane on the bottom layer. Also 0402 0.1µF bypass capacitors beside the power supply pins.
So, I bet it could be left floating...
About the datasheet - I usually check with digital multimeter if I am not 100% comfortable about the lack of information. If not connected at all, I just ground it. That's it.
It even give better cooling to IC,