Boolean Logic in a microcontroller

cedtinsi

Trying to understand what is at the core of a microcontroller, I made several researches that led me to the term Boolean logic. I ended up at howstuffworks.com at I have some concerns about how memory is created into a microcontroller. Down bellow is an extract from the website, and I do not understand why when R and S are both 1 the circuit remembers what was previously presented to it. When R is 1 we should have a 0 at Q according to the NAND gate right? same thing when S is 1; so why is it that the circuit remembers? shouldn't we have rather an error or illigal just as what we get when R and S are both 0 ?

please consider my concern and help me understand.
I want to get to know a microcontroller from its core and I need your help.
thank you.

extract bellow



Flip Flops

One of the more interesting things that you can do with Boolean gates is to create memory with them. If you arrange the gates correctly, they will remember an input value. This simple concept is the basis of RAM (random access memory) in computers, and also makes it possible to create a wide variety of other useful circuits.
Memory relies on a concept called feedback. That is, the output of a gate is fed back into the input. The simplest possible feedback circuit using two inverters is shown below:


If you follow the feedback path, you can see that if Q happens to be 1, it will always be 1. If it happens to be 0, it will always be 0. Since it's nice to be able to control the circuits we create, this one doesn't have much use -- but it does let you see how feedback works.
It turns out that in "real" circuits, you can actually use this sort of simple inverter feedback approach. A more useful feedback circuit using two NAND gates is shown below:


This circuit has two inputs (R and S) and two outputs (Q and Q'). Because of the feedback, its logic table is a little unusual compared to the ones we have seen previously:

R S Q Q' 0 0
[SIZE=-1]Illegal[/SIZE] 0 1 1 0 1 0 0 1 1 1
[SIZE=-1]Remembers[/SIZE] What the logic table shows is that:

• If R and S are opposites of one another, then Q follows S and Q' is the inverse of Q.
• If both R and S are switched to 1 simultaneously, then the circuit remembers what was previously presented on R and S.

There is also the funny illegal state. In this state, R and S both go to 0, which has no value in the memory sense. Because of the illegal state, you normally add a little conditioning logic on the input side to prevent it, as shown here:


In this circuit, there are two inputs (D and E). You can think of D as "Data" and E as "Enable." If E is 1, then Q will follow D. If E changes to 0, however, Q will remember whatever was last seen on D. A circuit that behaves in this way is generally referred to as a flip-flop.

Beau Schwabe

When R and S are both HIGH, you effectively have the circuit you have provided using just the inverters. Think of R and S as a means for 'gating' the inverter. If R and S are both LOW, your not going to kill the circuit or anything, it's just that now Q and Q' will both be HIGH which when a configuration like this is used as memory, that is an undefined state.

In practice a 6T or 6 Transistor memory cell is used. Four of the transistors are used to create two inverters and configured like your top image (See attached 4T.jpg). The remaining two transistors are used to connect to the ROW line for the particular memory cell being accessed and each act as a pass gate when enabled. Each memory bit has a differential pair, essentially "A" and "B" that can be read from or written to.(See attached 6T.jpg)

Each memory bit is read and driven differentially so when enabled, the bit pairs will always be 180 out of phase with one another. This criteria satisfies the "S" and "R" requirement that the will never both be LOW. Reading is done by placing a sense amp (Differential amplifier) on the bit pair to determine the polarity. Writing is done by driving the bit pairs to the desired state with larger COLUMN enabled transistors.

Hope this helps.

cedtinsi

Thank you Mr Beau. It surely is a great help, though I have even more questions.
Thank you.

Invent-O-Doc

Nothing new to say, but this was a really cool post. Thanks cedtinsi and beau.

Beau Schwabe

I'm a little surprised nobody has brought up that when you change the state of the memory cell. i.e from a "0" to a "1" or vise versa that your not allowed to drive an OUTPUT with another OUTPUT.

In most any other case this would be true, but with memory there is an interesting dichotomy that takes place. one of the main goals with memory is to create as small of a "bit cell" as you can, obviously to get the most memory in the tightest amount of space. For memory, this is beneficial, not only for taking up less real estate, but being small makes for a very weak transistor that can easily be overdriven which is exactly what happens. In the CMOS world it's similar to a voltage divider where the ratio of the transistor drive strength determines the divider voltage.