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NXP produces multicore (dual Cortex M0 & M4) processor

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Comments

  • Cluso99Cluso99 Posts: 18,069
    edited 2011-01-28 02:41
    I still find the prop easier to use and I only have to deal with one chip. However, I would prefer to have two choices :) Prop II as well!


    Actually, dual prop I dice in a chip would be nice in an 84 pin QFP :lol:
  • LeonLeon Posts: 7,620
    edited 2011-01-28 03:15
    My PCB software has a chip-on-board option which I have. If you can scrounge some dice from Parallax I'll design you a little PCB for them. :)
  • jmgjmg Posts: 15,189
    edited 2011-01-28 18:22
    another example of a "Dual Core" variant, is this one dates from ~2008
    http://eng.hochips.com/products.aspx

    A slightly strange choice, to Dual-up a Small 20 pin controller, but it seems to even be Asymmetric, with one core having 8 registers, and the other the more usual 4 banks of 8.
  • potatoheadpotatohead Posts: 10,261
    edited 2011-01-28 20:37
    It just occurred to me: Does anybody remember a wierd 6502 variant that had two 6502's running together in one chip? It used every other clock cycle for the cores. I don't recall it being used anywhere.
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-01-28 22:15
    jmg wrote: »
    another example of a "Dual Core" variant, is this one dates from ~2008
    http://eng.hochips.com/products.aspx

    A slightly strange choice, to Dual-up a Small 20 pin controller, but it seems to even be Asymmetric, with one core having 8 registers, and the other the more usual 4 banks of 8.

    Wow, this is very strange. I just looked up its datasheet. However, I do not see any available programmers or compilers based on that. Or are they all 8051 compatible? :)
  • jmgjmg Posts: 15,189
    edited 2011-01-29 17:00
    Or are they all 8051 compatible?
    Yes, it is a Standard 8051 core.
  • jmgjmg Posts: 15,189
    edited 2011-01-29 17:08
    Moving up the curve, I see a new Portable Playstation engine is coming:

    http://www.eetimes.eu/en/four-core-arm-a9-to-run-sony-game-console.html?cmp_id=7&news_id=222905647&vID=209

    ["will be run on a four-core Cortex-A9 processor from ARM and a PowerVR SGX543MP4+ graphics core from Imagination Technologies. NGP will make its debut at the end of the year 2011"]

    ["For memory the NGP will have a flash memory card dedicated for NGP software titles. NGP will also come equipped with two cameras on its front and rear, as well as three motion sensors, gyroscope, accelerometer and electronic compass, all of which are designed to enable users to enjoy the world of entertainment that is linked with real life experiences."]

    and AMD have an Embedded part that pushes towards Atom

    http://www.amd.com/us/press-releases/Pages/apu-embedded-systems-2011jan19.aspx
    Many cores:
    1 or 2 x86 “Bobcat” CPU cores with 1MB L2 cache, 64-bit Floating Point Unit
    Array of SIMD Engines
    * DirectX® 11 capable graphics
    * Industry-leading 3D and graphics processing
    Up to 1.6GHz
    9W and 18W TDP
  • markaericmarkaeric Posts: 282
    edited 2011-01-29 18:10
    Propeller+ARM sounds like a pretty good idea to me. Perhaps get rid of the hub ram, and sit a DMA engine in between the hub and the ARM. Besides being able to have the flexibility of software peripherals attached to a well adopted processor core, there's plenty of uses in the area of real time I/O integration.

    I know Parallax wants to stay away from using licensed IP, but the benefits might very well outweigh the drawbacks. Who knows, perhaps Parallax can even license out their own IP such as those sweet I/O pins stuffed in the Prop2!


    Edit:
    Instead of using an ARM core and P1 COGs, perhaps take the P1, run the hub at clock speed, replace one of the COGs with a P2 COG, and give it hub access every other instruction cycle, while keeping the the rest at every 8 like in a typical P1. The large hub ram bandwidth given to the P2 COG (especially if it implements RD/WR 4 LONG) would allow for a high performance LMM kernel.
  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2011-01-29 19:01
    Propeller and ARM is a nice way to go.

    Since working with multiple cores I find it hard to deal with the limitations of
    a single processor. It sometimes would be nice to have one very powerful core like a fast
    ARM along with several lesser cores to handle small tasks....no reason why
    all the cores need to be of equal power.

    A big chip with 8 ARMs and lots of flash memory and ram would be fun too.
    You could have multiple OP systems running with plenty of speed and capability.

    In a powerful multi-core embedded system where you need really good determinism you
    could use a hypervisor like the Wind River Hypervisor or the VxWorks MILS Separation Kernel.
    Great with multiple PowerPC cores.

    http://www.windriver.com/products/hypervisor/
    http://www.windriver.com/products/platforms/vxworks-mils/
  • LeonLeon Posts: 7,620
    edited 2011-01-31 12:40
    ARM has just announced new Cortex-R devices for real-time and safety-critical systems:

    http://www.design-reuse.com/news/25493/real-time-arm-cortex-processor-mobile-baseband-mass-storage-automotive.html

    offering high-frequency interrupts and deterministic operation. Dual-core versions are available.
  • RossHRossH Posts: 5,549
    edited 2011-01-31 14:05
    Leon wrote: »
    ARM has just announced new Cortex-R devices for real-time and safety-critical systems:

    http://www.design-reuse.com/news/25493/real-time-arm-cortex-processor-mobile-baseband-mass-storage-automotive.html

    offering high-frequency interrupts and deterministic operation. Dual-core versions are available.

    Is this like playing "Jeopardy"? ...
    A: "High Frequency Interrupts and deterministic operation".

    Q: Define "Oxymoron"!
    Ross.
  • LeonLeon Posts: 7,620
    edited 2011-01-31 14:20
    Why? Interrupts don't necessarily make a system non-deterministic.
  • RossHRossH Posts: 5,549
    edited 2011-01-31 15:33
    Leon wrote: »
    Why? Interrupts don't necessarily make a system non-deterministic.

    In trivial cases, where you only have to handle one interrupt (which is itself deterministc) then perhaps not. Otherewise, it does. There is a reasonable article from Atmel about this here. See the section titled "determinism and latency":
    A primary factor affecting determinism is how many interrupts a system must handle concurrently. In general, increasing the number of interrupts in the system will erode its determinism.
    Ross.
  • LeonLeon Posts: 7,620
    edited 2011-01-31 15:40
    ARM Cortex interrupts can have constant latency, making interrupt-driven applications deterministic. The AVR has rather primitive interrupt hardware compared with more modern devices which can handle interrupts from large numbers of peripherals (far more than are available on a Propeller) without any problems. Deterministic software can be written in C, while assembler is required with the Propeller.

    The Cortex-R7 delivers 1250 DMIPS per core, BTW.
  • RossHRossH Posts: 5,549
    edited 2011-01-31 16:41
    Leon wrote: »
    ARM Cortex interrupts can have constant latency, making interrupt-driven applications deterministic. The AVR has rather primitive interrupt hardware compared with more modern devices which can handle interrupts from large numbers of peripherals (far more than are available on a Propeller) without any problems. Deterministic software can be written in C, while assembler is required with the Propeller.

    The Cortex-R7 delivers 1250 DMIPS per core, BTW.

    Hi Leon,

    Did you not read the article I posted? Constant interrupt latency does NOT "make interrupt diven applications deterministic" except in the trivial case where you only need to handle one interrupt at a time. In the real world you will run into problems as soon as you have multiple interrupts - the specific architecture of the chip has nothing to do with it, nor can you have "constant interrupt latency" where you have multiple interrupt sources on a single processor.

    Also, why do you say assembler is required to to write deterministic software on the Propeller? C is just as deterministic as PASM (or SPIN for that matter) on the Propeller.

    Ross.
  • RossHRossH Posts: 5,549
    edited 2011-01-31 17:17
    Ooops! duplicate post deleted!
  • potatoheadpotatohead Posts: 10,261
    edited 2011-01-31 19:30
    Nothing like pounding it home Ross :)

    Why is it so hard to accept the specialized case Chip did? Round robin access, coupled with true concurrency is a interesting case, and it has it's strengths.
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