Cool Chip
Humanoido
Posts: 5,770
I have not had time to test a Propeller chip when all cogs are running and measure the temperature with a temperature gun, or measure when LED loads are placed on all pins (but never exceed maximum ratings). It would be useful to see what code operations make the chip warmer than other operations, if any. Is it an option to program in ways to keep the chip cool as possible and minimize chip stress or is this an insignificant factor?
Comments
Interesting question.
From what I understand a lot of the power consumption of a chip is down to the actual switching of transistors from on to off and vice-versa.
So presumably some instructions will cause more transistors change state than others simply because more transistors are used to implement those instructions.
For example I believe some of the instructions that uses a lot of transistors are the shifts and rotates. Doing a shift over many bit positions, as the Prop can do, requires a barrel shifter which is a large circuit.
Then we might see that more transistor switching happens for some operands than others. For example when shifting or rotating $FFFFFFFF less transitions occur than when shifting/rotating $55555555. Shifting a larger number of bit positions may cause more transistor activity.
So one experiment would be fill a COG with all the same instruction, say ROL, as much as possible. Perhaps with a LONG somewhere for the operands and a JMP START at the end.
Get all COGs loaded this way with the same instruction.
Measure the current draw.
Repeat the experiment for many different instructions and operand values.
Whilst doing this have no LED loads on the chip so as to make any current draw changes more noticeable.
Yes, for a real-time app run the clock as slow as you can to get the job done on time. Or change the clock speed when there is work to be done. Make sure to use waits on pins and counter which effectively halts the COG temporarily instead of using a simple polling loop.
For other apps where you want to be running full speed all the time, some calculation over a long time, then selecting different instructions to minimise power is not going to be so easy or give much benefit.
Beau should be able to advise on which instructions are the "heavy weights" in hardware/current draw.
In my over-clocking tests Biggest climb of heat was produced by BAD decoupling/Bulk capacitors
So can it be inferred that, without "stiff" power rails, the chip's transistors operate more in their linear region than they would with better decoupling?
-Phil
My experience is --->
Decoupling capacitors always needed!
Smaller dimensions of Power Rails BIGGER Bulk Capacitors as near propeller as possible
And YES it have relation to Linearity of transistors operation.
Most problems come from Transistors that are coupled In that way as one drive Output LOW and other HIGH and with bad power (That fluctuate) them are both active at same time before them change state of Output.