Timers again!
Tapperman
Posts: 319
I know there is probably a thread already that covers this question, but I can't find it! Maybe someone can point me to the answer?
goal: I wan't to use a timer for PWM signal at a programmable carrier freq. But it doesn't appear to me that the duty mode is going to work?
The output of the duty mode is the 'carry' bit of the timer. Is there another mode, or combination of modes that would achieve my goal?
... Tim
goal: I wan't to use a timer for PWM signal at a programmable carrier freq. But it doesn't appear to me that the duty mode is going to work?
The output of the duty mode is the 'carry' bit of the timer. Is there another mode, or combination of modes that would achieve my goal?
... Tim
Comments
-Phil
Thankyou Phil ... direct and to the point!
http://forums.parallax.com/showthread.php?p=931378#post931378
It is possible to do this by overlapping the outputs of two cog counters running in NCO mode. (no pasm intervention) They have the same frequency but offset phase. Cog counters obey the Propeller i/o control rule: output trumps input, high trumps low. So without a little outside help the PWM is variable from 50% to 100% by overlap of the high output phases at any chosen frequency. My solution to that was to add an external 2-input XOR gate, with the 50%-100% PWM going to the first input and a second propeller pin controlling the second input as a conditional inverter. That allows the full 0% to 100% PWM coverage with independently variable frequency and duty. That is the object PWM_2ctrx.spin and demo attached.
Now, to carry the story further. Kuroneko (the riddler!) wrote to say that the external XOR gate is irksome, and that it should be possible to use a third cog counter in POSDET mode as an inverter. A challenge! So the third object below does that. PWM_3ctrx.spin. A third counter is set up as an inverter, and its apin looks at the PWM output of the first two counters and inverts whatever it sees there at the next clock cycle, and puts that out on a second pin (its bpin). When the duty percentage crosses the 50% mark, the pins need to be swapped. So you get PWM 0% to 100% on one pin and its complement on the second pin, automomous (no spin or pasm intervention once running at a desired frequency and duty) .
-Phil
-- Tracy
Once again I wake up in the morning to find the Prop doing yet another impossible thing.
Thanks so much for all your help ... but, I was just making sure I wasn't overlooking any resources the chip might have had? As it turns out ... there is no direct way for a single timer to achieve my goal ... and at present, little would be gained to pursue this direction. Since I use only 1 cog to achieve PWM at any freq (below 10 KHz) on 3 pins at the same time. I would gain little, and loose much in the way of resources on the chip, if I pursued this direction. However, this is probably one of the cleverist uses of the timers I've seen yet!
... Tim
One of my favorite clever counter contraptions is Phil's radio receiver, and also the understanding behind his PWM generator using the video hardware, but it was still fun to come up with a solution that Phil said was "not possible":idea:, even if that hinged around the semantics of "a" timer!
Here is another little program along the same line. For illustration purposes. It directs two counters at the same pin, but this time at slightly different frequencies, so... it generates PWM at the beat frequency.
Was that the AM receiver? I really liked reading that one ... had special interest to me, because I had encountered 'noise' winding my own loops, and detecting the center freq of the tank when married with a cap.
I had thought about that in the back of my mind as a side project, and here someone already had the 'spark' in thier mind and did something with it!
... Tim
PS - thanks for the attach ... will study this evening (I love food for thought). This forum is GREAT!